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PC87351 bảng dữ liệu(PDF) 84 Page - National Semiconductor (TI) |
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PC87351 bảng dữ liệu(HTML) 84 Page - National Semiconductor (TI) |
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84 / 86 page ![]() 11.0 Device Characteristics (Continued) 84 www.national.com 11.2.12 Standard Parallel Port Timing Typical Data Exchange 11.2.13 Enhanced Parallel Port Timing Symbol Parameter Conditions Typ Max Unit tPDH Port Data Hold These times are system dependent and are therefore not tested. 500 nsec tPDS Port Data Setup These times are system dependent and are therefore not tested. 500 nsec tSW Strobe Width These times are system dependent and are therefore not tested. 500 nsec Symbol Parameter Min Max EPP 1.7 EPP 1.9 Unit tWW19a WRITE Active from WAIT Low 45 nsec tWW19ia WRITE Inactive from WAIT Low 45 nsec tWST19a DSTRB or ASTRB Active from WAIT Low 65 nsec tWEST DSTRB or ASTRB Active after WRITE Active 10 nsec tWPDH PD7-0 Hold after WRITE Inactive 0 nsec tWPDS PD7-0 Valid after WRITE Active 15 nsec tEPDW PD7-0 Valid Width 80 nsec tEPDH PD7-0 Hold after DSTRB or ASTRB Inactive 0 nsec tPDS tPDH tSW BUSY ACK PD7-0 STB WRITE DSTRB ASTRB PD7-0 WAIT Valid tWW19ia tWPDH tEPDH tEPDW or tWW19a tWST19a tWPDS tWEST tWST19a |
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