PC87303 datasheet(52/114 Pages) NSC

52 / 114 page

40 FDC Command Set Description (Continued)

Execution Phase

Internal registers are written

Result Phase

None

READ DATA

Command Phase

MFM

IPS

DR1

DR0

Track Number

Drive Head Number

Sector Number

Bytes per Sector

End of Track Sector Number

Intersector Gap Length

Data Length

Execution Phase

Data read from disk drive is transferred

to system via DMA or Non-DMA modes

Result Phase

Status Register 0

Status Register 1

Status Register 2

Track Number

Head Number

Sector Number

Bytes per Sector

READ DELETED DATA

Command Phase

MFM

IPS

DR1

DR0

Track Number

Drive Head Number

Sector Number

Bytes per Sector

End of Track Sector Number

Intersector Gap Length

Data Length

Execution Phase

Data read from disk drive is transferred

to system via DMA or Non-DMA modes

Result Phase

Status Register 0

Status Register 1

Status Register 2

Track Number

Head Number

Sector Number

Bytes per Sector

READ ID

Command Phase

MFM

XXXHDDR1

DR0

Execution Phase

Controller reads first ID Field header

bytes it can find and reports these bytes to the system in the

result bytes

Result Phase

Status Register 0

Status Register 1

Status Register 2

Track Number

Head Number

Sector Number

Bytes per Sector

READ A TRACK

Command Phase

MFM

IPS

DR1

DR0

Track Number

Drive Head Number

Sector Number

Bytes per Sector

End of Track Sector Number

Intersector Gap Length

Data Length

Execution Phase

Data read from disk drive is transferred

to system via DMA or non-DMA modes

Result Phase

Status Register 0

Status Register 1

Status Register 2

Track Number

Head Number

Sector Number

Bytes per Sector

RECALIBRATE

Command Phase

000001

000000DR1

DR0

Execution Phase

Disk drive head is stepped out to Track 0

Result Phase

None

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