AT89C51CC03U-RDTIM datasheet(49/195 Pages) ATMEL

49 / 195 page

AT89C51CC03

4182I–CAN–06/05

Table 16. Programming Spaces

Notes: 1. The sequence 5xh and Axh must be executing without instructions between them

otherwise the programming is not executed (see Flash Status Register)

2. The sequence 5xh and Axh must be executed with the same FMOD0 FMOD1

configuration.

3. Interrupts that may occur during programming time must be disabled to avoid any

spurious exit of the programming mode.

Status of the Flash Memory

The bit FBUSY in FCON register is used to indicate the status of programming.

FBUSY is set when programming is in progress.

The flash programming process is launched the second machine cycle following the

sequence 5xh and Axh in FCON. Thus the FBUSY flag should be read by sofware not

during the insctruction after the 5xh, Axh sequence but the the second instruction after

the 5xh, Axh sequence in FCON (See next example). FBUSY is cleared when the pro-

gramming is completed.

;*F*************************************************************************

;* NAME: launch_prog

;;***************************************************************************

launch_prog:

MOV FCON, #050h

MOV FCON #0A0h ; Flash Write Sequence

NOP

;Required time before reading busy flag

wait_busy:

MOV A,FCON

JB ACC.0,wait_busy

RET

Selecting FM1

The bit ENBOOT in AUXR1 register is used to map FM1 from F800h to FFFFh.

Loading the Column Latches

Any number of data from 1-byte to 128 Bytes can be loaded in the column latches. This

provides the capability to program the whole memory by byte, by page or by any number

of Bytes in a page. Data written in the column latches do not have to be in consecutive

Write to FCON

Operation

FPL3:0

FPS

FMOD1

FMOD0

User

No action

Write the column latches in user

space

Extra Row

No action

Write the column latches in extra row

space

Hardware

Security

Byte

No action

Write the fuse bits space

Reset

Columns

Latches

No action

Reset the column latches

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