2003 Jun 30

4

Philips Semiconductors

Product specification

Quad 2-input NAND gate

74HC00; 74HCT00

Fig.2 Pin configuration DHVQFN14.

handbook, halfpage

114

1A

VCC

7

2

3

4

5

6

1B

1Y

2A

2B

2Y

13

12

11

10

9

4B

4A

4Y

3B

3A

8

GND

3Y

MNA950

Top view

(1) The die substrate is attached to this pad using conductive die

attach material. It can not be used as a supply pin or input.

handbook, halfpage

MNA211

A

B

Y

Fig.3 Logic diagram (one gate).

handbook, halfpage

MNA212

1Y

1A

3

1B

1

2

2Y

2A

6

2B

4

5

3Y

3A

8

3B

9

10

4Y

4A

11

4B

12

13

Fig.4 Function diagram.

handbook, halfpage

MNA246

3

&

&

&

&

2

1

6

5

4

8

10

9

11

13

12

Fig.5 IEC logic symbol.