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FT4222HQ-C-R bảng dữ liệu(PDF) 23 Page - Future Technology Devices International Ltd. |
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FT4222HQ-C-R bảng dữ liệu(HTML) 23 Page - Future Technology Devices International Ltd. |
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23 / 49 page ![]() Copyright © Future Technology Devices International Limited 23 FT4222H USB2.0 TO QUADSPI/I2C BRIDGE IC 1.3 Document No.: FT_001011 Clearance No.: FTDI#405 5.4 GPIOs When the configuration mode of the FT4222H is set as CNFMODE0 or CNFMODE1, a GPIO pipe will be enabled. These 4 pins, GPIO0, GPIO1, GPIO2 and GPIO3, can be set as general purpose Input/Output pins or other functions such as multi-channel SPI slave selections, I2C interface, suspend out indicator, remote wake up input or interrupt. If no functions are set on these pins, the default function is GPIO. The user can set the direction for GPIOs via the API, FT4222_GPIO_Init, defined in LibFT4222. The logic level can be read and written via the APIs, FT4222_GPIO_Read and FT4222_GPIO_Write. The FT4222H also provides an interrupt input source for the user to utilize. GPIO3(pin-16) can be set as an interrupt input source via the API, FT4222_SetWakeUpInterrupt, defined in LibFT4222. GPIO3 can be set as a rising edge or falling edge triggered interrupt via FT_Prog. The related parameter defined in the user area is named as the interrupt trigger edge. The default setting is raising edge triggered. Details can be referenced in Table9.1. Figure5.8 shows the different behaviour when GPIO3 acts as GPIO or interrupt. The interrupt is set by default as rising edge triggered. Users can choose either one for their application. Figure 5.8 Different status when GPIO3 set as GPIO or interrupt input |
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