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ADP3500AST bảng dữ liệu(PDF) 16 Page - List of Unclassifed Manufacturers |
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ADP3500AST bảng dữ liệu(HTML) 16 Page - List of Unclassifed Manufacturers |
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16 / 29 page ![]() ADP3500 REV.PrP 2/6/02 - 16 - ADP3500 and the external A/D converter, this full scale voltage may be trimmed digitally with 5 bits stored in register 12h. At full scale input voltage, the output voltage of MVBAT can be scaled in 6 mV steps, allowing a very fine calibration of the battery voltage measurement. The MVBAT buffer is enabled by the MVEN bit of register 11h, and will consume less than 1 uA of leakage current when disabled. 1.4 REFERENCE The ADP3500 has an internal, temperature compensated and trimmed band-gap reference. The battery charger and LDO's all use this system reference. This reference is not available for use externally. However, to reduce thermal noise in the LDOs, the reference voltage is brought out to the NRCAP pin through a 50kohm internal resistor. A cap on the NRCAP pin will complete a low pass filter that will reduce the noise on the reference voltage. All the LDO's, with the exception of LDO3, use the filtered reference. Since the reference voltage appears at NRCAP through a 50kohm series internal impedance, it is very important to never place any load current on this pin. Even a volt meter with 10 megohm input impedance will affect the resulting reference voltage by about 6 or 7 mV, affecting the accuracy of the LDO's and charger. If for some reason the reference must be measured, be certain to use a high impedance range on the volt meter or a discrete high impedance buffer prior to the measurement system. 2. LOGIC BLOCKS ADP3500 has following logic functions. • Three wire Serial Interface (CS, CLK, DATA) • RTC counter section has Year, Month, Day, Week, Hour, Minute, and Second, and controls Leap year, and days in month automatically. • Detect Alarms based on RTC counter. • Periodically constant interrupt feature. (2Hz, 1Hz, 1/60Hz, 1/3600Hz, Once a months) • GPIO and INT ports control • Key-pad interface • LED light control • LDO functions • Clock and Reset output control • Stay-Alive timer Following is a block diagram based on Logic circuit. PRELIMINARY TECHNICAL DATA |
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