ADA2200ARUZ datasheet(5/25 Pages) AD

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ADA2200

Data Sheet

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

DIGITAL I/O

Logic Thresholds

All inputs/outputs

Input Voltage

Low

0.8

High

2.0

Output Voltage

Low

While sinking 200 µA

0.4

High

While sourcing 200 µA

VDD − 0.4

Maximum Output Current

Sink or source

Input Leakage

µA

Internal Pull-Up Resistance

BOOT and RST only

kΩ

CRYSTAL OSCILLATOR

Internal Feedback Resistor

500

kΩ

CLKIN Capacitance

XOUT Capacitance

POWER REQUIREMENTS

Power Supply Voltage Range

2.7

3.6

Total Supply Current Consumption

395

485

µA

See the Terminology section.

Common-mode signal swept from fMOD − 1 kHz to fMOD + 1 kHz. Output measured at frequency offset from fMOD. For example, a common-mode signal at fMOD − 500 Hz is

measured at 500 Hz.

The input impedance is equal to a 4 pF capacitor switched at fCLKIN. Therefore, the input impedance = 1012/(2πfCLKIN × 4).

SPI TIMING CHARACTERISTICS

VDD = 2.7 V to 3.6 V, default register configuration, TA = −40 to +85°C, unless otherwise noted.

Table 2. SPI Timing

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

fSCLK

50% ± 5% duty cycle

MHz

CS to SCLK edge

tSL

SCLK low pulse width

tSH

SCLK high pulse width

tDAV

Data output valid after SCLK edge

tDSU

Data input setup time before SCLK edge

tDHD

Data input hold time after SCLK edge

tDF

Data output fall time

tDR

Data output rise time

tSR

SCLK rise time

tSF

SCLK fall time

tDOCS

Data output valid after CS edge

tSFS

CS high after SCLK edge

Rev. 0 | Page 4 of 24

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