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MB91F465KB bảng dữ liệu(PDF) 26 Page - Cypress Semiconductor

tên linh kiện MB91F465KB
Giải thích chi tiết về linh kiện  32-bit RISC, load/store architecture, five-stage pipeline
PDF  86 Pages
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MB91F465KB bảng dữ liệu(HTML) 26 Page - Cypress Semiconductor

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MB91460K Series
Document Number: 002-04602 Rev. *A
Page 26 of 86
86
8.4.7
TBR (Table Base Register)
The table base register stores the starting address of the vector table used in EIT processing.
The initial value at reset is 000FFC00H.
8.4.8
RP (Return Pointer)
The return pointer stores the address for return from subroutines.
During execution of a CALL instruction, the PC value is transferred to this RP register.
During execution of a RET instruction, the contents of the RP register are transferred to PC.
The initial value at reset is undefined.
8.4.9
USP (User Stack Pointer)
The user stack pointer, when the S flag is “1”, this register functions as the R15 register.
■ The USP register can also be explicitly specified.
The initial value at reset is undefined.
■ This register cannot be used with RETI instructions.
8.4.10
Multiply & Divide Registers
These registers are for multiplication and division, and are each 32 bits in length.
The initial value at reset is undefined.
bit 0
bit 31
000FFC00H
Initial value
bit 0
bit 31
XXXXXXXXH
Initial value
bit 0
bit 31
XXXXXXXXH
Initial value
bit 0
MDL
bit 31
MDH



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