MB91F465KB datasheet(70/86 Pages) CYPRESS

70 / 86 page

MB91460K Series

Document Number: 002-04602 Rev. *A

Page 70 of 86

(VDD5  AVCC5  3.0 V to 5.5 V, VSS5  AVSS5  0 V, TA  40°C to  105°C)

Parameter

Symbol

Pin name

Condition

Value

Unit

Remarks

Min

Typ

Max

Pull-up

resistance

RUP

Pnn_m [1]

INITX

1. Pnn_m includes all GPIO pins. The pull up resistors must be enabled by PPER/PPCR setting and the pins must be in input direction.

3.0V VDD 3.6V

100

160



4.5V VDD 5.5V

100

Pull-down

resistance

RDOWN

Pnn_m[2]

2. Pnn_m includes all GPIO pins. The pull down resistors must be enabled by PPER/PPCR setting and the pins must be in input direction.

3.0V VDD 3.6V

100

180



4.5V VDD 5.5V

100

Input

capacitance

CIN

All except VDD5,

VDD5R, VSS5,

AVCC5, AVSS5,

AVRH5

 1 MHz

Power supply

current

MB91F-465Kx

ICC

VDD5R

CLKB:

80 MHz

CLKP:

40 MHz

CLKT:

40 MHz

CLKCAN: 40 MHz

Code fetch from Flash

ICCH

VDD5R

TA   25°C

150

A

At stop mode [3]

3. Main regulator OFF, sub regulator set to 1.2V, Low voltage detection disabled.

TA   105°C

400

2000

A

TA   25°C

100

500

A

RTC : 4 MHz mode [3]

TA   105°C

500

2400

A

TA   25°C

250

A

RTC :

100 kHz mode [3]

32 kHz mode [4 ]

Main regulator OFF, sub regulator set to 1.2V, Low voltage detection disabled, RC oscillator enabled. Additional current consumption of

Sub oscillator IOSC has to be taken into account

TA   105°C

450

2200

A

ILVE

VDD5

150

A

External low voltage

detection

ILVI

VDD5R

100

A

Internal low voltage

detection

IOSC

VDD5

250

500

A

Main clock (4 MHz)

A

Sub clock (32 kHz)



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