Data Sheet

ADuCM330/ADuCM331

Rev. C | Page 11 of 16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

NOTES

1. DNC = DO NOT CONNECT. DO NOT CONNECT THIS PIN.

2. IT IS RECOMMENDED THAT THE EXPOSED PAD BE

SOLDERED TO GROUND FOR THERMAL REASONS.

1

DNC

2

DGND

3

DVDD18

4

DVDD33

5

33VDD

6

AVDD18

7

AGND

8

VREF

24

23

22

21

20

19

18

17

RESET

SWDIO

SWCLK

GPIO0/CS/LIN_RX

GPIO1/SCLK/LIN_TX

GPIO2/MISO

GPIO3/IRQ0/MOSI/LC_TX/LIN_TX

GPIO4/IRQ1/LC_RX/ECLKIN/LIN_RX

TOP VIEW

(Not to Scale)

ADuCM330/

ADuCM331

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Type1

Description

1

RESET

I

Reset Input Pin. Active low. This pin has an internal pull-up resistor to 33VDD.

2

SWDIO

I/O

Cortex-M3 Debug Data Input and Output Channel. At power-on, this output is disabled and

pulled high via an internal pull-up resistor. This pin can be left unconnected when not in use.

3

SWCLK

I

Cortex-M3 Debug Clock Input. This is an input pin only and has an internal pull-up resistor. This

pin can be left unconnected when not in use.

4

GPIO0/CS/LIN_RX

I/O

General-Purpose Input/Output 0 (P0.0) (GPIO0). By default, this pin is configured as an input.

The pin has an internal 25 kΩ pull-up resistor to 33VDD and, when not in use, can be left

unconnected.

Chip Select (CS). When configured, this pin also operates the SPI chip select input.

Local Interconnect Network Receiver (Rx) (LIN_RX). This pin can be configured as the Rx pin for

LIN frames in external transceiver mode.

5

GPIO1/SCLK/LIN_TX

I/O

General-Purpose Input/Output 1 (P0.1) (GPIO1). By default, this pin is configured as an input.

This pin is used by the kernel in external mode. See the ADuCM330/ADuCM331 hardware

reference manual for more information. The pin has an internal 25 kΩ pull-up resistor to 33VDD

and, when not in use, can be left unconnected.

Serial Clock Input (SCLK). When configured, this pin operates the SPI serial clock input.

Local Interconnect Network Transmitter (Tx) (LIN_TX). This pin can be configured as the Tx pin

for LIN frames in external transceiver mode.

6

GPIO2/MISO

I/O

General-Purpose Input/Output 2 (P0.2) (GPIO2). By default, this pin is configured as an input. The pin

has an internal 25 kΩ pull-up resistor to 33VDD and, when not in use, can be left unconnected.

Master Input/Slave Output (MISO). When configured, this pin also operates the SPI master

input/slave output.

7

GPIO3/IRQ0/MOSI/

LC_TX/LIN_TX

I/O

General-Purpose Input/Output 3 (P0.3) (GPIO3). By default, this pin is configured as an input.

This pin is used by the kernel in external mode. See the ADuCM330/ADuCM331 hardware

reference manual for more information. The pin has an internal 25 kΩ pull-up resistor to 33VDD

and, when not in use, can be left unconnected.

Interrupt Request (IRQ0). This pin can also be configured as External Interrupt Request 0.

Master Output/Slave Input (MOSI). This pin can be configured as an SPI master output/slave

input pin.

LIN Conformance Tx (LC_TX). This pin can be connected to the LIN physical Tx for LIN

conformance testing.

Local Interconnect Network Tx (LIN_TX). This pin can also be connected as the Tx pin for LIN

frames in external transceiver mode.