P83C266BDR datasheet(50/92 Pages) PHILIPS

50 / 92 page

1999 Mar 10

Philips Semiconductors

Product speciﬁcation

Microcontrollers for PAL/SECAM TV

with OSD and VST

P8xCx66 family

17.3.2

OSD CONTROL REGISTER 1 (OSCON)

Table 52 OSD Control Register 1 (SFR address C1H)

Table 53 Description of OSCON bits

76543210

Split

Mesh

Mode

OSDE

BIT

SYMBOL

DESCRIPTION

Split

Split space control. If Split = 0, then split space is disabled. If Spilt = 1, then split

space is enabled on frame-by-frame basis. Split space only effects Space 1 (SP1)

because Space 2 (SP2) is displayed transparent.

Mesh

OSD meshing mode. If Mesh = 0, then the OSD meshing mode is disabled.

If Mesh = 1, the OSD meshing mode is enabled.

Mode

Background mode selection. If Mode = 0, then TV mode is selected (FB only active

when there are characters displayed). If Mode = 1, then Frame mode is selected (FB is

active in every single active scan line; FB is inactive during horizontal and vertical

retrace period).

4Hp

HSYNC active polarity selection. If Hp = 0, then HSYNC is an active LOW input.

If Hp = 1, then HSYNC is an active HIGH input. See Fig.30.

3Vp

VSYNC active polarity selection. If Vp = 0, then VSYNC is an active LOW input.

If Vp = 1, then VSYNC is an active HIGH input. See Fig.30.

2Bp

Active R, G, B and FB output polarity selection. If Bp = 0, then these signals are all

active LOW. If Bp = 1, then these signals are all active HIGH. See Fig.31.

1BF

Character blinking frequency control. If BF = 0, the blinking frequency is 1

⁄32fVSYNC. If

BF = 1, the blinking frequency is 1

⁄64fVSYNC. The duty cycle of the blinking frequency is

fixed at 1 : 1.

OSDE

OSD circuit general enable/disable. If OSDE = 0, the OSD is disabled and the R, G, B

and FB signals stay in the inactive status (inverse of the Bp bit in SFR OSCON). If

OSDE = 1, the OSD is enabled.

Fig.30 HSYNC and VSYNC active level selection.

handbook, full pagewidth

MGL284

character display interval

fly-back period

HSYNC/VSYNC pin

Hp/Vp = 1 (active HIGH)

HSYNC/VSYNC pin

Hp/Vp = 0 (active LOW)

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