P89682K datasheet(14/44 Pages) APLUS

14 / 44 page

Integrated Circuits Inc.

aP89682K/341K/170K/085K

Ver 2.5.1

May 24 2016

aP89 Mode :

This trigger mode is function setting similar with APLUS 1st Generation OTP IC

(aP89341/aP89170/aP89085 ).

In aP89 Mode Operating Mode Setting:

M1=0, M0=0 set the chip into Key Trigger Mode.

It operates to reference Key Mode.

M1=0, M0=1 set the chip into CPU Parallel Command Mode.

It operates to reference CPU Parallel Mode.

M1=1, M0=0 set the chip into CPU Serial Command Mode.

The CPU serial command compatible with APLUS 1st Generation OTP IC.

It is controlled by command sent to it from the host CPU.S1 to S3 are used to input command word

into the chip while OUT1 to OUT3 as output from the chip to the host CPU for feedback response.

S1 acts as CS (Chip Select) to initiate the command word input

S2 acts as SCK (Serial Clock) to clock-in the command word at rising edge.

S3 acts as DI (Data-In) to input the command bits.

OUT1 acts as BUSY to indicate the chip is in busy state(include play and ramp).

OUT2 acts as OUT function to output user selected information.

OUT3 acts as Load signal to indicate the Voice Group address buffer is full and waiting for play.

aP89Mode -CPU Serial Command Table [LSB First, Command Byte First]:

Fig. 10 aP89Mode CPU Serial Command Table

PREFETCH

Voice Group Address Number

PLAY

Voice Group Address Number

PU1 w/o Ramp

None

PU2 with Ramp

None

PD1 w/o Ramp

None

PD2 with Ramp

None

VOL

VOL[3:0]

VOL--

None

VOL++

None

PAUSE

None

RESUME

None

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