Data Sheet

AD7616

Rev. 0 | Page 49 of 50

STATUS REGISTER

The status register is a 16-bit read only register. If the STATUSEN bit or the CRCEN bit is set to Logic 1 in the configuration register, the

status register is read out at the end of all conversion words for the selected channels, including the self test channel if enabled in

sequencer mode. Consult the CRC section and Figure 68.

MSB

LSB

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

A[3:0]

B[3:0]

CRC[7:0]

Table 28. Bit Descriptions for Status Register

Bit

Bit Name

Settings

Description

Access

[D15:D12]

A[3:0]

Channel index for previous conversion result on Channel A.

N/A

R

[D11:D8]

B[3:0]

Channel index for previous conversion result on Channel B.

N/A

R

[D7:D0]

CRC[7:0]

CRC calculation for the previous conversion result(s). Refer to the CRC section

for further details.

N/A

R