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WM8281ECS/R bảng dữ liệu(PDF) 384 Page - Cirrus Logic

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WM8281
384
Rev 4.0
OUTPUT SIGNAL DRIVE STRENGTH CONTROL
The WM8281 supports configurable drive strength control for the digital output pins. This can be used
to assist system-level integration and design considerations.
The drive strength control registers are described in Table 135. Note that, in the case of bi-directional
pins (eg. GPIOn), the drive strength control registers are only applicable when the pin is configured as
an output.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R3120
(0C30h)
Misc Pad
Ctrl 7
10
CIF1MISO_GPIO
4_DRV_STR
1
CIF1MISO / GPIO4 output drive strength
0 = 4mA
1 = 8mA
2
CIF1SDA_CIF1M
OSI_DRV_STR
1
CIF1SDA / CIF1MOSI output drive
strength
0 = 4mA
1 = 8mA
R3121
(0C31h)
Misc Pad
Ctrl 8
2
CIF2SDA_DRV_
STR
1
CIF2SDA output drive strength
0 = 4mA
1 = 8mA
R3122
(0C32h)
Misc Pad
Ctrl 9
10
AIF1LRCLK_DRV
_STR
1
AIF1LRCLK output drive strength
0 = 4mA
1 = 8mA
2
GPIO1_DRV_ST
R
1
GPIO1 output drive strength
0 = 4mA
1 = 8mA
R3123
(0C33h)
Misc Pad
Ctrl 10
10
AIF1BCLK_DRV_
STR
1
AIF1BCLK output drive strength
0 = 4mA
1 = 8mA
2
AIF1TXDAT_DR
V_STR
1
AIF1TXDAT output drive strength
0 = 4mA
1 = 8mA
R3124
(0C34h)
Misc Pad
Ctrl 11
10
AIF2LRCLK_DRV
_STR
1
AIF2LRCLK output drive strength
0 = 4mA
1 = 8mA
2
GPIO2_DRV_ST
R
1
GPIO2 output drive strength
0 = 4mA
1 = 8mA
R3125
(0C35h)
Misc Pad
Ctrl 12
10
AIF2BCLK_DRV_
STR
1
AIF2BCLK output drive strength
0 = 4mA
1 = 8mA
2
AIF2TXDAT_DR
V_STR
1
AIF2TXDAT output drive strength
0 = 4mA
1 = 8mA
R3126
(0C36h)
Misc Pad
Ctrl 13
10
AIF3LRCLK_DRV
_STR
1
AIF3LRCLK output drive strength
0 = 4mA
1 = 8mA
2
GPIO3_DRV_ST
R
1
GPIO3 output drive strength
0 = 4mA
1 = 8mA
R3127
(0C37h)
Misc Pad
Ctrl 14
10
AIF3BCLK_DRV_
STR
1
AIF3BCLK output drive strength
0 = 4mA
1 = 8mA
2
AIF3TXDAT_DR
V_STR
1
AIF3TXDAT output drive strength
0 = 4mA
1 = 8mA



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