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KSZ8091RNA bảng dữ liệu(PDF) 39 Page - Microchip Technology

tên linh kiện KSZ8091RNA
Giải thích chi tiết về linh kiện  10BASE-T/100BASE-TX PHY with RMII and EEE Support
PDF  62 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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 2016 Microchip Technology Inc.
DS00002298A-page 39
KSZ8091RNA/RND
Note 4-1
RW = Read/Write; RO = Read Only; SC = Self-Cleared.
4.3
MMD Registers
MMD registers provide indirect read/write access to up to 32 MMD Device Addresses with each device supporting up
to 65,536 16-bit registers, as defined in Clause 22 of the IEEE 802.3 Specification. The KSZ8091RNA/RND, however,
uses only a small fraction of the available registers. See the MMD Register Descriptions section for a list of supported
MMD device addresses and their associated register addresses.
The following two standard registers serve as the portal registers to access the indirect MMD registers.
• Standard register Dh – MMD Access – Control
• Standard register Eh – MMD Access – Register/Data
1F.10
Power
Saving
1 = Enable power saving
0 = Disable power saving
RW
0
1F.9
Interrupt
Level
1 = Interrupt pin active high
0 = Interrupt pin active low
RW
0
1F.8
Enable
Jabber
1 = Enable jabber counter
0 = Disable jabber counter
RW
1
1F.7
RMII Refer-
ence Clock
Select
1 = For KSZ8091RNA, clock input to XI (Pin 8) is
50 MHz for RMII – 50 MHz Clock Mode.
For KSZ8091RND, clock input to XI (Pin 8) is
25 MHz for RMII – 25 MHz Clock Mode.
0 = For KSZ8091RNA, clock input to XI (Pin 8) is
25 MHz for RMII – 25 MHz Clock Mode.
For KSZ8091RND, clock input to XI (Pin 8) is
50 MHz for RMII – 50 MHz Clock Mode.
RW
0
1F.6
Reserved
Reserved
RW
0
1F.5:4
LED Mode
[00] = LED0: Link/Activity
[01] = LED0: Link
[10], [11] = Reserved
RW
00
1F.3
Disable
Transmitter
1 = Disable transmitter
0 = Enable transmitter
RW
0
1F.2
Remote
Loopback
1 = Remote (analog) loopback is enabled
0 = Normal mode
RW
0
1F.1
Reserved
Reserved
RW
0
1F.0
Disable Data
Scrambling
1 = Disable scrambler
0 = Enable scrambler
RW
0
TABLE 4-5:
PORTAL REGISTERS (ACCESS TO INDIRECT MMD REGISTERS)
Address
Name
Description
Mode
Default
Register Dh - MMD Access - Control
D.15:14
MMD –
Operation
Mode
For the selected MMD device address (bits [4:0] of
this register), these two bits select one of the fol-
lowing register or data operations and the usage
for MMD Access – Register/Data (Reg. Eh).
00 = Register
01 = Data, no post increment
10 = Data, post increment on reads and writes
11 = Data, post increment on writes only
RW
00
D.13:5
Reserved
Reserved
RW
00_0000_000
TABLE 4-4:
VENDOR SPECIFIC REGISTER DESCRIPTIONS (CONTINUED)
Address
Name
Description
Mode
Note 4-1
Default



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