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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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LAN9211 bảng dữ liệu(PDF) 91 Page - SMSC Corporation |
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LAN9211 bảng dữ liệu(HTML) 91 Page - SMSC Corporation |
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91 / 147 page  High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support Datasheet SMSC LAN9211 91 Revision 2.9 (03-01-12) DATASHEET 5.3.11 RX_FIFO_INF—Receive FIFO Information Register This register contains the used space in the receive FIFOs of the LAN9211 Ethernet Controller. 5.3.12 TX_FIFO_INF—Transmit FIFO Information Register This register contains the free space in the transmit data FIFO and the used space in the transmit status FIFO in the LAN9211. Offset: 7Ch Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31-24 Reserved RO - 23-16 RX Status FIFO Used Space (RXSUSED). Indicates the amount of space in DWORDs, used in the RX Status FIFO. RO 00h 15-0 RX Data FIFO Used Space (RXDUSED).). Reads the amount of space in bytes, used in the RX data FIFO. For each receive frame, this field is incremented by the length of the receive data rounded up to the nearest DWORD (if the payload does not end on a DWORD boundary). RO 0000h Offset: 80h Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31-24 Reserved RO - 23-16 TX Status FIFO Used Space (TXSUSED). Indicates the amount of space in DWORDS used in the TX Status FIFO. RO 00h 15-0 TX Data FIFO Free Space (TDFREE). Reads the amount of space in bytes, available in the TX data FIFO. The application should never write more data than is available, as indicated by this value. RO 1200h |
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