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UCS1002-2 bảng dữ liệu(PDF) 80 Page - Microchip Technology

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Giải thích chi tiết về linh kiện  Programmable USB Port Power Controller with Charger Emulation
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Programmable USB Port Power Controller with Charger Emulation
Datasheet
Revision 1.4 (07-16-13)
80
SMSC UCS1002
DATASHEET
temperature exceeds the TREG value, or emulation is restarted. In the case of the BC1.2 DCP or
Legacy 2 charger emulation profiles, this will be the short (RDCP_RES). In the case of the Legacy
1, or Legacy 3 - 7 profiles, this will be the DPOUT and DMOUT pin voltages. If a portable device
does not draw charging current, the DCE Cycle will behave normally.
Bits 1 - 0 - EM_RESET_TIME[1:0] - Determines the length of the tEM_RESET time (see Section 9.8.1,
"Emulation Reset") as shown in Table 10.8.
Note 10.1 When measured, the actual emulation reset time will be tEM_RESET plus tDISCHARGE.
10.4.3
Switch Configuration - 17h
The contents of this register are retained in Sleep.
Bit 7 - PIN_IGNORE - Ignores the M1, M2, PWR_EN, and EM_EN pin states when determining the
Active mode selection and power state.
‘0’ (default) - The Active mode selection and power state will be set by the OR’d combination of
the M1, M2, PWR_EN, and EM_EN pin states and the corresponding bit states.
‘1’ - The Active mode selection and power state will be set by the individual control bits and not by
the M1, M2, PWR_EN, and EM_EN pin states. These pin states are ignored.
Bit 5 - EM_EN_SET - In conjunction with other controls, determines the Active mode that is selected
(see Section 9.2, "Active Mode Selection") and power state (see Table 5.1, "Power States Control
Settings"). This bit is OR’d with the EM_EN pin.
Bit 4 - M2_SET - In conjunction with other controls, determines the Active mode that is selected (see
Section 9.2) and power state (see Table 5.1). This bit is OR’d with the M2 pin.
Bit 3 - M1_SET - In conjunction with other controls, determines the Active mode that is selected (see
Section 9.2) and power state (see Table 5.1). This bit is OR’d with the M1 pin.
Bit 2 - S0_SET - In SMBus mode, enables the Attach and Removal Detection feature and affects the
power state (see Section 5.3.6, "S0 Input").
‘0’ - Detection is not enabled. Also see Table 5.1, "Power States Control Settings".
‘1’ (default) - Detection is enabled. Also see Table 5.1.
Bit 1 - PWR_EN_SET - Controls whether the port power switch may be turned on or not and affects
the power state (see Section 5.3.4, "PWR_EN Input"). This bit is OR’d with the PWR_EN pin and the
polarity of both are controlled by SEL pin decode. Thus, if the polarity is set to active high, either the
PWR_EN pin or this bit must be ‘1’ to enable the port power switch.
Table 10.8 EM_RESET_TIME Bit Decode
EM_RESET_TIME[1:0]
TEM_RESET TIME (SEE Note 10.1)
10
0
0
50 ms (default)
01
75 ms
10
125 ms
11
175 ms



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