STM32F091CB datasheet(78/127 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F091xB STM32F091xC

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DocID026284 Rev 3

Static latch-up

Two complementary static tests are required on six parts to assess the latch-up

performance:

•

A supply overvoltage is applied to each power supply pin.

•

A current injection is applied to each input, output and configurable I/O pin.

These tests are compliant with EIA/JESD 78A IC latch-up standard.

6.3.13

I/O current injection characteristics

As a general rule, current injection to the I/O pins, due to external voltage below VSS or

above VDDIOx (for standard, 3.3 V-capable I/O pins) should be avoided during normal

product operation. However, in order to give an indication of the robustness of the

microcontroller in cases when abnormal injection accidentally happens, susceptibility tests

are performed on a sample basis during device characterization.

Functional susceptibility to I/O current injection

While a simple application is executed on the device, the device is stressed by injecting

current into the I/O pins programmed in floating input mode. While current is injected into

the I/O pin, one at a time, the device is checked for functional failures.

The failure is indicated by an out of range parameter: ADC error above a certain limit (higher

than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out

of the -5 µA/+0 µA range) or other functional failure (for example reset occurrence or

oscillator frequency deviation).

The characterization results are given in Table 52.

Negative induced leakage current is caused by negative injection and positive induced

leakage current is caused by positive injection.

Table 50. ESD absolute maximum ratings

Symbol

Ratings

Conditions

Packages

Class

Maximum

value(1)

Unit

VESD(HBM)

Electrostatic discharge voltage

(human body model)

TA = +25 °C, conforming

to JESD22-A114

All

2000

VESD(CDM)

Electrostatic discharge voltage

(charge device model)

TA = +25 °C, conforming

to ANSI/ESD STM5.3.1

WLCSP64,

LQFP100

250

All others

500

1. Data based on characterization results, not tested in production.

Table 51. Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TA = +105 °C conforming to JESD78A

II level A

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