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STM32F318C8 bảng dữ liệu(PDF) 88 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  ARM-based Cortex-M4 32-bit MCUFPU, 64 KB Flash, 16 KB SRAM, ADC, DAC, 3 COMP, Op-Amp, 1.8 V
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STM32F318C8 bảng dữ liệu(HTML) 88 Page - STMicroelectronics

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Electrical characteristics
STM32F318C8 STM32F318K8
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DocID026294 Rev 5
SPI/I2S characteristics
Unless otherwise specified, the parameters given in Table 57 for SPI or in Table 58 for I2S
are derived from tests performed under ambient temperature, fPCLKx frequency and VDD
supply voltage conditions summarized in Table 20.
Refer to Section 6.3.13: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO for SPI and WS, CK, SD for I2S).
Table 57. SPI characteristics(1)
1. Data based on characterization results, not tested in production.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
-
-
18
MHz
Slave mode
-
-
18
Slave mode transmitter/full
duplex
--
13(2)
2. 2.Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has
to fit into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the
SPI communicates with a master having tsu(MI) = 0 while Duty(SCK) = 50%.
tsu(NSS)
NSS setup time
Slave mode, SPI presc = 2
4*Tpcl
k
--
ns
th(NSS)
NSS hold time
Slave mode, SPI presc = 2
2*Tpcl
k
--
tw(SCKH)
tw(SCKL)
SCK high and low
time
Master mode, fPCLK = 36
MHz, presc = 4
Tpclk-
2
Tpclk
Tpclk+
2
tsu(MI)
tsu(SI)
Data input setup time
Master mode
0
-
-
Slave mode
1
-
-
th(MI)
Data input hold time
Master mode
6.5
-
-
th(SI)
Slave mode
2.5
-
-
ta(SO)
Data output access
time
Slave mode
8
-
40
tdis(SO)
Data output disable
time
Slave mode
8
-
14
tv(SO)
Data output valid time
Slave mode
-
23
38
tv(MO)
Master mode
-
1.5
4
th(SO)
Data output hold time
Slave mode
9.5
-
-
th(MO)
Master mode
0
-
-



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