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TMS320DM642 bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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TMS320DM642 bảng dữ liệu(HTML) 5 Page - Texas Instruments |
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5 / 178 page ![]() www.ti.com Contents TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor SPRS200J – JULY 2002 – REVISED AUGUST 2005 1 TMS320DM642 Video/Imaging Fixed-Point Digital 5 DM642 Peripheral Information and Electrical Signal Processor ......................................... 1 Specifications ........................................... 72 1.1 Features .............................................. 1 5.1 Parameter Information .............................. 72 5.2 Recommended Clock and Control Signal Transition 1.2 Description ............................................ 2 Behavior ............................................. 74 1.2.1 Device Compatibility ................................. 3 5.3 Power Supplies ...................................... 74 1.3 Functional Block Diagram ............................ 4 5.4 Enhanced Direct Memory Access (EDMA) Control- 2 Device Overview ......................................... 6 ler .................................................... 79 2.1 Device Characteristics ................................ 6 5.5 Interrupts ............................................ 83 2.2 CPU (DSP Core) Description ......................... 7 5.6 Reset ................................................ 85 2.3 Memory Map Summary ............................. 13 5.7 Clock PLL ........................................... 88 2.4 Bootmode ........................................... 16 5.8 External Memory Interface (EMIF) .................. 94 2.5 Pin Assignments .................................... 16 5.9 Multichannel Audio Serial Port (McASP0) Periph- 2.6 Development ........................................ 50 eral ................................................. 110 3 Device Configurations ................................. 54 5.10 Inter-Integrated Circuit (I2C) ....................... 118 3.1 Configurations at Reset ............................. 54 5.11 Host-Port Interface (HPI) .......................... 124 3.2 Configurations After Reset .......................... 56 5.12 Peripheral Component Interconnect (PCI) ........ 130 3.3 Peripheral Configuration Lock ....................... 59 5.13 Multichannel Buffered Serial Port (McBSP) ....... 134 3.4 Device Status Register Description ................. 61 5.14 Video Port ......................................... 143 3.5 Multiplexed Pin Configurations ...................... 63 5.15 VCXO Interpolated Control (VIC) .................. 151 3.6 Debugging Considerations .......................... 65 5.16 Ethernet Media Access Controller (EMAC) ........ 153 3.7 Configuration Examples ............................. 66 5.17 Management Data Input/Output (MDIO) .......... 159 4 Device Operating Conditions ........................ 70 5.18 Timer ............................................... 161 4.1 Absolute Maximum Ratings Over Operating Case 5.19 General-Purpose Input/Output (GPIO) ............ 163 Temperature Range 5.20 JTAG ............................................... 166 (Unless Otherwise Noted) .......................... 70 Revision History ............................................ 168 4.2 Recommended Operating Conditions ............... 70 6 Mechanical Data ....................................... 170 4.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Case 6.1 Thermal Data ...................................... 170 Temperature (Unless Otherwise Noted) ............ 71 6.2 Packaging Information ............................. 171 Contents 5 |
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