| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
LP064V1 bảng dữ liệu(PDF) 7 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
LP064V1 bảng dữ liệu(HTML) 7 Page - NXP Semiconductors |
|
7 / 20 page ![]() LP064V1 LIQUID CRYSTAL DISPLAY SPECIFICATIONS TITLE: LP064V1 REV. 1 PAGE 7 OF 7 DATA DISPLAY AG Industriestrasse 1 D-82110 Germering MAY 2001 http://www.datadisplay.de Tel.: +49-89-894450-0 Fax: +49-89-894450-90 5. INTERFACE CONNECTIONS This LCD employs two interface connections, a 31 pin connector is used for the module and a three pin connector is used for the integral backlight system. The electric interface connector is model DF9B-31P-1V, manufactured by Hirose. The mating connector part number is DF9-31S-1V or equivalent. The pin configuration for the connector is shown in the table below. Table 3: MODULE CONNECTOR PIN CONFIGURATION Pin Symbol Description Notes 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Vss CLK Hsync Vsync Vss R0 R1 R2 R3 R4 R5 Vss G0 G1 G2 G3 G4 G5 Vss B0 B1 B2 B3 B4 B5 Vss DTMG Vdd Vdd OAS NC Ground Main clock Horizontal sync. Vertical sync. Ground Red data Red data Red data Red data Red data Red data Ground Green data Green data Green data Green data Green data Green data Ground Blue data Blue data Blue data Blue data Blue data Blue data Ground Data Timing Signal Power(+5V) Power(+5V) O/A, A/V Selection No Connection Connect to Vss, see Note 1 Connect to Vss, see Note 1 Red data least significant bit(LSB) Red data most significant bit(MSB) Connect to Vss, see Note 1 Green data least significant bit(LSB) Green data most significant bit(MSB) Connect to Vss, see Note 1 Blue data least significant bit(LSB) Blue data most significant bit(MSB) Connect to Vdd, see Note 2 Connect to Vdd, see Note 2 see Note3 Note 1: All GND (ground) pins should be connected together and to Vss which should also be connected to the LCD’s metal frame. Note 2: All VDD (power input) pins should be connected together. Note 3: This pin is Logic input pin and is connected VDD (power input) with surge protection circuit. Note 4: DTMG, HSYNC and VSYNC shall be supplied simultaneously. |
|
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |