SDA9401 datasheet(12/69 Pages) ETC

12 / 69 page

Micronas

Preliminary Data Sheet

SDA 9401

signal.

Input read parameter

The figure below shows applications of the picture insert mode. For this feature an additional PIP

circuit (e.g. SDA 9388, SDA 9488/89) is necessary. Together with the PIP IV circuit (SDA 9488/89)

also split screen applications like double window are possible. The compression of the inserted

picture has also be done by the external PIP or front-end processor.

Picture insert mode: application examples picture tracking, random pictures

6.2

Input format conversion (IFC)

Input signals

The SDA 9401 accepts at the input side the sample frequency relations of Y : (B-Y) : (R-Y): 4:2:2

and CCIR 656. In case of CCIR 656 three modes are supported (FORMAT=11 means full CCIR 656

support, including H-, V-Sync and Field signal, FORMAT=01 means only data processing, H- and

V-Sync have to be added separately according PAL/NTSC norm, FORMAT=10 means only data

processing, H- and V-sync have to be added separately according CCIR656-PAL/NTSC norm). The

representation of the samples of the chrominance signal is programmable as positive dual code

(unsigned, parameter TWOIN=0) or two's complement code (TWOIN=1, see also

chapter I²C bus

format on page 45, I²C bus parameter 00h). Inside the SDA 9401 all algorithms assume positive

dual code.

Parameter

Subaddress

Description

TVMODE

33h

TV standard of the incoming signal:

1: NTSC

0: PAL

Signals

Pin number

Description

YIN0...7

43, 44, 45, 46, 47, 48, 49, 50 luminance input

UVIN0...7

31, 32, 33, 34, 37, 38, 39, 40 chrominance input

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