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STW5094 bảng dữ liệu(PDF) 24 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  18 BIT 8kHz TO 48kHz LOW POWER STEREO AUDIO DAC WITH INTEGRATED POWER AMPLIFIERS AND VOICE CODEC
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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STW5094 bảng dữ liệu(HTML) 24 Page - STMicroelectronics

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ELECTRICAL CHARACTERISTICS (unless otherwise specified, VCCIO = 1.8V to 3.3V, Tamb = -30°C to 85°C;
typical characteristic are specified at VCCIO = 3.0V, Tamb = 25°C; all signals are referenced to GND)
Digital Interfaces (See Figure 8)
Analog Interfaces
* with series resistor
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VIL
Input Low Voltage
All digital inputs except
REMIN
DC
AC
0.3VCCIO
0.2VCCIO
V
V
VIH
Input High Voltage
All digital inputs except
REMIN
DC
AC
0.7VCCIO
0.8VCCIO
V
V
VILREM Input Low Voltage
REMIN input
0.5
V
VIHREM Input High Voltage
REMIN input
1.4
V
VOL
Output Low Voltage
All digital outputs, IL =10µA
All digital outputs, IL = 2mA
0.1
0.4
V
V
VOH
Output High Voltage
All digital outputs, IL = 10
µA
All digital outputs, IL = 2mA
VCCIO-0.1
VCCIO-0.4
V
V
IIL
Input Low Current
Any digital input,
GND < VIN < VIL
-10
10
µA
IIH
Input High Current
Any digital input,
VIH < VIN < VCCIO
-10
10
µA
IOZ
Output Current in High impedance
(Tristate)
DX and CO
-10
10
µA
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
RMBIAS
MBIAS Output Resistance
MBIAS 100mV under VCC
150
Ω
IMIC
MIC Input Leakage
GND < VMIC < VCC
-100
+100
µA
RMIC
MIC Input Resistance
GND < VMIC < VCC
50
k
Ω
RFM
FM Input Resistance
FML, FMR to CAP2
30
k
Ω
RLHP
Single Ended Drivers Load
Resistance
HPL, HPR to GNDP
30
Ω
CLHP
Single Ended Drivers Load
Capacitance
HPL, HPR to GNDP
100
50*
pF
nF
ROVHP
Single Ended Drivers Output
Resistance
Steady zero PCM code applied to
DR; I =
±1mA
1
Ω
RLLS
Differential Driver Load
Resistance
LSP to LSN
8
Ω
CLLS
Differential Driver Load
Capacitance
LSP to LSN
100
50*
pF
nF
ROLS
Differential Driver Output
Resistance
Steady zero PCM code applied to
DR; I =
±1mA
1
Ω
VOSLS
Differential offset Voltage at LSP,
LSN
Alternating
± zero PCM code
applied to DR maximum receive
gain; RL =50Ω
-50
+50
mV



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