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PC87427 bảng dữ liệu(PDF) 18 Page - National Semiconductor (TI) |
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PC87427 bảng dữ liệu(HTML) 18 Page - National Semiconductor (TI) |
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18 / 46 page ![]() 1.0 Signal/Pin Connection and Description (Continued) www.national.com 18 Revision 1.0 1.4.15 Power and Ground 1.5 INTERNAL PULL-UP AND PULL-DOWN RESISTORS The signals listed in Table 3 have internal pull-up (PU) and/or pull-down (PD) resistors. The internal resistors are optional for those signals indicated as “Programmable”. See Section 2.3 on page 25 for the values of each resistor type. Signal Pin(s) I/O Buffer Type Description VSS 11, 43, 68, 93, 115 I GND Ground. Serves for both on-chip logic, output drivers and back-up battery circuit. VDD 69, 116 I PWR Digital 3.3V Power Supply. Serves as power supply for the legacy peripherals and the LPC Interface. VSB 12, 40, 92 I PWR Standby Digital 3.3V Power Supply. Used for the SMBus and X-Bus interfaces, the GPIO ports and the clock generator. When active, it also powers the RTC and the SWC. VCORF 70 I/O PWR On-Chip Core Power Converter Filter. Used by the on-chip core power converter which powers the core logic of all the device modules. An external 1 µF ceramic filter capacitor must be connected between this pin and V SS. VBAT 41 I INULR Battery Power Supply. When VSB is off, this supply provides battery back-up to the SWC registers, the RTC and the 32 KHz crystal oscillator. The pin is connected to the internal logic through a series resistor for UL-compliant protection. Table 3. Internal Pull-Up and Pull-Down Resistors Signal Pin(s) Power Well Type Comments Keyboard and Mouse Controller (KBC) P12, P16, P17 121, 75, 66 VDD PU30 SMBus (SMB) Interface SMBCLK 47 VSB PU30 Programmable1 SMBDAT 46 VSB PU30 Programmable1 SMBALERT35 VSB PU30 Programmable1 Health Monitoring and Control (HMC) LMPCIF 82 VSB PU1K25 Programmable2 THRMTRIP1, THRMTRIP2 21, 22 VDD PU30 VRMTHRM 83 VDD PU30 System Wake-Up Control (SWC) PWBTIN 36 VSB PU30 SLBTIN 35 VSB PU30 PWBTOUT 49 VSB PU30 Note 3 SIOSMI 37 VSB PU30 SIOSCI 38 VSB PU30 |
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