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CS89712 bảng dữ liệu(PDF) 132 Page - Cirrus Logic

tên linh kiện CS89712
Giải thích chi tiết về linh kiện  HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH 10BASE-T ETHERNET CONTROLLER
PDF  170 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS89712 bảng dữ liệu(HTML) 132 Page - Cirrus Logic

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CS89712
132
DS502PP2
3.18.17 TX Bid Status Register (BusST, address offset 138h)
BusST describes the status of the current transmit operation.
Reset value is: 0000 0000 0001 1000
76
5:0
F
E
D
TxBidErr
011000
CBA
9
8
Rdy4Tx NOW
Bit
Description
5:0
011000: These bits provide an internal address used by the CS89712 to identify this as register
18, the Bus Status Register. When reading this register, these bits will be 011000, where the
LSB corresponds to Bit 0.
7
TxBidErr: If set, the software has commanded the Ethernet port to transmit a frame that the
Ethernet port will not send. Frames that the Ethernet port will not send are:
1) Any frame greater than 1514 bytes, provided that InhibitCRC
(Register 9, TxCMD, Bit C) is clear.
2) Any frame greater than 1518 bytes.
Note that this bit is not set when transmit frames are too short.
8
Rdy4TxNOW: Rdy4TxNOW signals the software that the Ethernet port is ready to accept a
frame from the software for transmission. This bit is similar to Rdy4Tx (Register C, BufEvent,
Bit 8) except that there is no interrupt associated with Rdy4TxNOW. The software can poll the
CS89712 and check Rdy4TxNOW to determine if the CS89712 is ready for transmit. (See Sec-
tion 2.34,
“Transmit Operation” for a description of the transmit bid process.)
Table 82. TX Bid Status



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