TS80C51RA2-VCKB datasheet(15/74 Pages) ATMEL

15 / 74 page

Rev. C - 06 March, 2001

TS80C51RA2/RD2

TS83C51RB2/RC2/RD2

TS87C51RB2/RC2/RD2

ASSEMBLY LANGUAGE

; Block move using dual data pointers

; Destroys DPTR0, DPTR1, A and PSW

; note: DPS exits opposite of entry state

; unless an extra INC AUXR1 is added

;

00A2

AUXR1 EQU 0A2H

;

0000 909000

MOV DPTR,#SOURCE

; address of SOURCE

0003 05A2

INC

AUXR1

; switch data pointers

0005 90A000

MOV DPTR,#DEST

; address of DEST

0008

LOOP:

0008 05A2

INC

AUXR1

; switch data pointers

000A E0

MOVX A,@DPTR

; get a byte from SOURCE

000B A3

INC

DPTR

; increment SOURCE address

000C 05A2

INC

AUXR1

; switch data pointers

000E F0

MOVX @DPTR,A

; write the byte to DEST

000F A3

INC

DPTR

; increment DEST address

0010 70F6

JNZ

LOOP

; check for 0 terminator

0012 05A2

INC

AUXR1

; (optional) restore DPS

INC is a short (2 bytes) and fast (12 clocks) way to manipulate the DPS bit in the AUXR1 SFR. However,

note that the INC instruction does not directly force the DPS bit to a particular state, but simply toggles it.

In simple routines, such as the block move example, only the fact that DPS is toggled in the proper sequence

matters, not its actual value. In other words, the block move routine works the same whether DPS is '0' or '1'

on entry. Observe that without the last instruction (INC AUXR1), the routine will exit with DPS in the

opposite state.

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