MCP3918A1-ESLASHML datasheet(47/88 Pages) MICROCHIP

47 / 88 page

 2014 Microchip Technology Inc.

DS20005287A-page 47

MCP3918

6.5

Continuous Communications,

Looping on Register Sets

The

MCP3918

digital

interface

can

process

communications in Continuous mode, without having

to enter an SPI command between each read or write

to a register. This feature allows the user to reduce

communication overhead to the strict minimum, which

diminishes EMI emissions and reduces switching noise

in the system.

The registers can be grouped into multiple sets for

continuous communications. The grouping of the

registers in the different sets is defined by the

READ<1:0> and WRITE bits that control the internal

SPI communication address pointer. For a graphical

representation of the register map sets in the function

of the READ<1:0> and WRITE bits, please see

Table 9-2.

In the case of a continuous communication, there is

only one Control byte on SDI to start the

communication after a CS pin falling edge. The part

stays within the same communication loop until the CS

pin returns logic high. The SPI internal register address

pointer starts by transmitting/receiving the address

defined

the

Control

byte.

After

this

first

transmission/reception, the SPI internal register

address pointer automatically increments to the next

available address in the register set for each

transmission/reception. When it reaches the last

address in the set, the communication sequence is

finished. The address pointer loops automatically back

to the first address of the defined set and restarts a new

sequence with auto-increment (see Table 6-6). The

undefined or unused addresses are automatically

jumped by the address pointer (they are not considered

to be part of the register map by the address pointer).

This internal address pointer automatic selection

allows the following functionality:

• Read one ADC channel data continuously

• Continuously read the entire register map

• Continuously read or write each separate register

• Continuously read or write all configuration

registers

FIGURE 6-6:

Continuous Communication Sequences.

Continuous READ communication (24-bit format)

Don’t care

SCK

SDI

SDO

Hi-Z

CONTROL

BYTE

24x

ADDR

...

ADDR + n

Starts read sequence

at address ADDR

Complete READ sequence

ADDR + 1

24x

...

24x

ADDR

...

Complete READ sequence

ADDR + 1

24x

...

24x

ADDR + n

Continuous WRITE communication (24-bit format)

Don’t care

SCK

SDI

SDO

Hi-Z

CONTROL

BYTE

24x

ADDR

...

ADDR + n

Starts write sequence

at address ADDR

Complete WRITE sequence

ADDR + 1

24x

...

24x

ADDR

...

Complete WRITE sequence

ADDR + 1

24x

...

24x

ADDR + n

Don’t care

ADDR

ADDR + 1

...

ADDR + n

Complete

READ

sequence

Roll-over

ADDRESS SET

ADDR

ADDR + 1

...

ADDR + n

Complete

WRITE

sequence

Roll-over

ADDRESS SET

High Z

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