MCP3919 datasheet(53/88 Pages) MICROCHIP

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DS20005347A-page 53

MCP3919

7.0

2-WIRE SERIAL INTERFACE

DESCRIPTION

7.1

OVERVIEW

The 2-Wire Interface mode is designed for applications

that require galvanic isolation. It allows a minimum

number of digital isolator channels, specifically one bi-

directional or two unidirectional channels to be con-

nected to the MCP3919 when interfacing through an

isolation barrier. This functionality reduces the total

system cost in an isolated applications system like a

polyphase shunt-based energy meter. It is recom-

mended to use the MCP3919 with the 2-Wire mode for

digitally isolated applications and with the SPI mode for

other applications where galvanic isolation is not

required.

The principle of this 2-Wire Interface is simple: it has a

serial clock input pin (SCK/MCLK), and a serial data

output pin (SDO) and it automatically sends output data

in packets (frames) at a DRCLK data rate (every time

new data is available on the ADC outputs). It has no

serial input pin to diminish the number of isolated chan-

nels. At the same time, the serial clock pin SCK also

becomes the master clock (MCLK) input pin of the

device and the part becomes fully synchronous with

SCK = MCLK. The system then becomes fully synchro-

nous and can be driven by only one master clock for

multiple phases, which ensures proper synchronization

and constant phase angle between phases, which is

important for an energy metering application.

The SDO pin becomes the only output of the device

and is fully synchronous with the serial/master clock.

The SDO pin is never in high-impedance in this mode

and is, by default, at logic low when not transmitting

data. The SDO pin idles logic low in this mode because

most of the digital isolator devices consume less cur-

rent in a logic low state than in a logic high state. This

effectively reduces the total power consumption of a

system with digital isolation devices.

When the part has entered 2-Wire mode, the logic pins

RESET, SDI, CS, OSC1 and DR become logic input

pins for the configuration of the device (respectively

OSR0/OSR1/BOOST/GAIN0/GAIN1).

These

pins

need to have well-defined logic states for low-power

applications. These pins define the only settings that

can be modified in 2-Wire mode.

The MDAT0/1 pins are always disabled and kept into a

high-impedance state during the 2-Wire Interface

mode. These pins can be grounded for applications

exclusively using the 2-Wire Interface mode so that the

EMI/EMC susceptibility of the part is improved.

FIGURE 7-1:

MCP3919 2-Wire Interface Typical Application Schematic.

SDO

GAIN1

SCK/MCLK

OSR0

BOOST

CH0+

CH0-

CH1+

CH1-

MCP3919

ANALOG

DIGITAL

SINC

PGA

GAIN=1x

SINC

PGA

Modulator

MOD<3:0>

MOD<7:4>

Modulator

Isolator

2-wire

Interface

OSR1

To SPI Ports

Of an MCU

GAIN0

MDAT0

MDAT1

Logic inputs

connected

to DVDD or

DGND

Main MCU/

CPU Board

Isolation

Barrier

Optional

connections to 2

additional isolators

SINC

PGA

GAIN=1x

MOD<11:8>

Modulator

PGA

GAIN=1x

SINC

CH2+

CH2-

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