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P89LPC930FDH bảng dữ liệu(PDF) 55 Page - NXP Semiconductors

tên linh kiện P89LPC930FDH
Giải thích chi tiết về linh kiện  8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
PDF  55 Pages
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nhà sản xuất  PHILIPS [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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P89LPC930FDH bảng dữ liệu(HTML) 55 Page - NXP Semiconductors

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© Koninklijke Philips Electronics N.V. 2004.
Printed in the U.S.A.
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 15 December 2004
Document order number: 9397 750 14472
Contents
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
1
General description . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3.1
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5
Pinning information. . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5.1
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
6
Logic symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7
Special function registers. . . . . . . . . . . . . . . . . . . . . 11
8
Functional description . . . . . . . . . . . . . . . . . . . . . . . 16
8.1
Enhanced CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8.2
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8.2.1
Clock definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8.2.2
CPU clock (OSCCLK) . . . . . . . . . . . . . . . . . . . . . . . 16
8.2.3
Low speed oscillator option . . . . . . . . . . . . . . . . . . . 16
8.2.4
Medium speed oscillator option . . . . . . . . . . . . . . . . 16
8.2.5
High speed oscillator option . . . . . . . . . . . . . . . . . . . 16
8.2.6
Clock output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8.3
On-chip RC oscillator option . . . . . . . . . . . . . . . . . . 17
8.4
Watchdog oscillator option . . . . . . . . . . . . . . . . . . . . 17
8.5
External clock input option . . . . . . . . . . . . . . . . . . . . 17
8.6
CPU CLock (CCLK) wake-up delay . . . . . . . . . . . . . 19
8.7
CPU CLOCK (CCLK) modification: DIVM register . . 19
8.8
Low power select . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.9
Memory organization . . . . . . . . . . . . . . . . . . . . . . . . 19
8.10
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8.10.1
External interrupt inputs . . . . . . . . . . . . . . . . . . . . . . 20
8.11
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8.11.1
Port configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.11.2
Quasi-bidirectional output configuration. . . . . . . . . . 22
8.11.3
Open-drain output configuration. . . . . . . . . . . . . . . . 22
8.11.4
Input-only configuration . . . . . . . . . . . . . . . . . . . . . . 22
8.11.5
Push-pull output configuration . . . . . . . . . . . . . . . . . 22
8.11.6
Port 0 analog functions . . . . . . . . . . . . . . . . . . . . . . 22
8.11.7
Additional port features . . . . . . . . . . . . . . . . . . . . . . 24
8.12
Power monitoring functions . . . . . . . . . . . . . . . . . . . 24
8.12.1
Brownout detection . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.12.2
Power-on detection . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.13
Power reduction modes . . . . . . . . . . . . . . . . . . . . . . 24
8.13.1
Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.13.2
Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.13.3
Total Power-down mode . . . . . . . . . . . . . . . . . . . . . . 25
8.14
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.14.1
Reset vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.15
Timers/counters 0 and 1 . . . . . . . . . . . . . . . . . . . . . 26
8.15.1
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.15.2
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.15.3
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.15.4
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.15.5
Mode 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.15.6
Timer overflow toggle output . . . . . . . . . . . . . . . . . . 27
8.16
Real-Time clock/system timer . . . . . . . . . . . . . . . . . 27
8.17
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.17.1
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.17.2
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.3
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.4
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.5
Baud rate generator and selection . . . . . . . . . . . . . . 28
8.17.6
Framing error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.17.7
Break detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.17.8
Double buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.17.9
Transmit interrupts with double buffering
enabled (Modes 1, 2 and 3) . . . . . . . . . . . . . . . . . . . 29
8.17.10
The 9th bit (bit 8) in double buffering (Modes 1, 2 and
3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.18
I2C-bus serial interface . . . . . . . . . . . . . . . . . . . . . . . 30
8.19
Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . 31
8.19.1
Typical SPI configurations. . . . . . . . . . . . . . . . . . . . . 33
8.20
Analog comparators . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.20.1
Internal reference voltage . . . . . . . . . . . . . . . . . . . . . 35
8.20.2
Comparator interrupt. . . . . . . . . . . . . . . . . . . . . . . . . 36
8.20.3
Comparators and power reduction modes . . . . . . . . 36
8.21
Keypad interrupt (KBI) . . . . . . . . . . . . . . . . . . . . . . . 36
8.22
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.23
Additional features . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.23.1
Software reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.23.2
Dual data pointers. . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.24
Flash program memory. . . . . . . . . . . . . . . . . . . . . . . 38
8.24.1
General description. . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.24.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.24.3
Using Flash as data storage . . . . . . . . . . . . . . . . . . . 38
8.24.4
ISP and IAP capabilities of the P89LPC930/931 . . . 38
8.25
User configuration bytes . . . . . . . . . . . . . . . . . . . . . . 40
8.26
User sector security bytes . . . . . . . . . . . . . . . . . . . . 40
9
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
10
Static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 42
11
Dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . 44
12
Comparator electrical characteristics . . . . . . . . . . . 51
13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
16
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
18
Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54



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