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ST7MC1K2TC bảng dữ liệu(PDF) 178 Page - STMicroelectronics

tên linh kiện ST7MC1K2TC
Giải thích chi tiết về linh kiện  8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI
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MOTOR CONTROLLER (Cont’d)
Table 40. Step Frequency/Period Range (4MHz)
Table 41. Modes of Accessing MTIM Timer-Related Registers
Step Ratio Bits
ST[3:0] in MPRSR
Register
Maximum
Step Frequency
Minimum
Step Frequency
Minimum
Step Period
Maximum
Step Period
0000
23.5 kHz
7.85 kHz
42.5
µs
127.5
µs
0001
11.7 kHz
3.93 kHz
85
µs255 µs
0010
5.88 kHz
1.96 kHz
170
µs510 µs
0011
2.94 kHz
980 Hz
340
µs1.02 ms
0100
1.47 kHz
490 Hz
680
µs2.04 ms
0101
735 Hz
245 Hz
1.36 ms
4.08 ms
0110
367 Hz
123 Hz
2.72 ms
8.16 ms
0111
183 Hz
61.3 Hz
5.44 ms
16.32 ms
1000
91.9 Hz
30.7 Hz
10.9 ms
32.6 ms
1001
45.9 Hz
15.4 Hz
21.8 ms
65.2 ms
1010
22.9 Hz
7.66 Hz
43.6 ms
130 ms
1011
11.4 Hz
3.83 Hz
87 ms
261 ms
1100
5.74 Hz
1.92 Hz
174 ms
522 ms
1101
2.87 Hz
0.958 Hz
349 ms
1.04 s
1110
1.43 Hz
0.479 Hz
697 ms
2.08 s
1111
0.718 Hz
0.240 Hz
1.40 s
4.17 s
State of MCRA / MCRB / MPAR Register Bits
Access to MTIM Timer Related Registers
RST bit
TES[1:0] SWA bit CKE bit
Mode
Read Only
Access
Read / Write Access
0
xx
x
0
Configuration Mode
MTIM, MTIML, MZPRV, MZREG,
MCOMP, MDREG, ST[3:0]
0
00
0
1
Switched Mode
MTIM, ST[3:0]
MCOMP, MDREG, MZREG, MZPRV
RMI bit of MISR:
0: No action
1: Decrement ST[3:0]
RPI bit of MISR:
0: No action
1: Increment ST[3:0]
0
00
1
1
Autoswitched Mode
MTIM, ST[3:0]
MDREG, MCOMP, MZREG, MZPRV,
RMI, RPI bit of MISR:
Set by hardware, (increment ST[3:0])
Cleared by software
0
01
10
11
x
1
Speed Sensor Mode
MTIM, MTIML,
ST[3:0]
MDREG,MZREG, MZPRV,
RMI, RPI bit of MISR, :
Set by hardware, (increment or decre-
ment ST[3:0]), cleared by software.
1



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