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ST7MC1K2TC bảng dữ liệu(PDF) 115 Page - STMicroelectronics

tên linh kiện ST7MC1K2TC
Giải thích chi tiết về linh kiện  8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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ST7MC1K2TC bảng dữ liệu(HTML) 115 Page - STMicroelectronics

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LINSCI
™ SERIAL COMMUNICATION INTERFACE (SCI Mode) (cont’d)
10.5.6 Low Power Modes
10.5.7 Interrupts
The SCI interrupt events are connected to the
same interrupt vector (see Interrupts chapter).
These events generate an interrupt if the corre-
sponding Enable Control Bit is set and the inter-
rupt mask in the CC register is reset (RIM instruc-
tion).
Mode
Description
WAIT
No effect on SCI.
SCI interrupts cause the device to exit from
Wait mode.
HALT
SCI registers are frozen.
In Halt mode, the SCI stops transmitting/re-
ceiving until Halt mode is exited.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
Transmit Data Register
Empty
TDRE
TIE
Yes
No
Transmission Com-
plete
TC
TCIE
Received Data Ready
to be Read
RDRF
RIE
Overrun Error or LIN
Synch Error Detected
OR/
LHE
Idle Line Detected
IDLE
ILIE
Parity Error
PE
PIE
LIN Header Detection
LHDF
LHIE
1



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