AS6200 datasheet(19/35 Pages) AMSCO

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[v1-01] 2016-Jun-17

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AS6200 − Detailed Descriptions

Bus Address

A slave address consists of seven bits, followed by a data

direction bit (read/write operation). The slave address can be

selected from a pool of two different address settings by

connecting the input pin ADD0 to an appropriate signal as

summarized in the following table.

The ADD0 must not be left unconnected.

Figure 27:

I²C Address Select Configuration

Read/Write Operation

In order to access an internal data register, the index register

must be written in advance. This register contains the actual

access. A typical transfer consists of the transmission of the

slave address with a write operation indication, followed by the

transmission of the register address and is finalized with the

actual register content data transfer. This implies that every

write operation to the temperature sensor device requires a

value for the index register prior to the transmission of the

actual register data.

The index register defines the register address for both the write

and read operation. Consequently, if a read operation is

executed, the register address is taken from the index register

which was defined from the last write operation.

If a different register needs to be read, the index register has to

be written in advance to define the new register address. This

is accomplished by transmitting the slave address with a low

R/W bit, followed by the new content of the index register.

Subsequently, the master provokes a START condition on the

bus and transmits the slave address with a high R/W bit in order

to initiate a read operation.

Since the index register always keeps its last value, reads can

be executed repetitively on the same register.

Similarly to the byte transfer where the MSB is transmitted first,

the transfer of a 16-bit word is executed by a two byte transfer

whereas the MSB byte is always transmitted first.

ADD0 Connection

Device Address (bin)

Device Address (hex)

VSS

100 1000

0x48

VDD

100 1001

0x49

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