UCD3138ARMHT datasheet(24/87 Pages) TI1

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DTC1

DTC0

SR2DPWM

SR1DPWM

DPWM

module

Dead-time control

computation engine

Decoder

Rising edge

optimization

control

Rising edge

optimization

control

CTRL

OUT

UCD7138

DTC

VCC

CTRL

OUT

UCD7138

DTC

VCC

SR1

SR2

UCD3138A

SLUSC66C – MARCH 2015 – REVISED SEPTEMBER 2016

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Product Folder Links: UCD3138A

Specifications

5.7.1.8

DPWM Synchronization

This section describes the register settings and hardware considerations necessary to modulate the

DPWM pins with PCMC and internal slope compensation.

DPWM1 is synchronized to DPWM0, DPWM2 is synchronized to DPWM1, and DPWM3 is synchronized to

DPWM2, ½ period out of phase using these commands:

Dpwm1Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; //configured to slave

Dpwm2Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; // configured to slave

Dpwm3Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; // configured to slave

Dpwm0Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC;

Dpwm1Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC;

Dpwm2Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC;

LoopMuxRegs.DPWMMUX.bit.DPWM1_SYNC_SEL

= 0;

LoopMuxRegs.DPWMMUX.bit.DPWM2_SYNC_SEL

= 1;

LoopMuxRegs.DPWMMUX.bit.DPWM3_SYNC_SEL

= 2;

// Slave to dpwm-0

// Slave to dpwm-1

// Slave to dpwm-2

If the event registers on the DPWMs are the same, the two pairs of signals are symmetrical. All code

examples are taken from the PSFB EVM code, unless otherwise stated.

5.7.1.9

Synchronous Rectifier Dead-Time Optimization Peripheral

The UCD3138A has an advanced dead time control interface where it can accept output signals from the

UCD7138 device and optimize SR gate driver signals accordingly. The UCD7138 low-side MOSFET driver

is a high-performance driver for secondary-side synchronous rectification (SR) with body diode conduction

sensing. The device is suitable for high power high efficiency isolated converter applications where dead-

time optimization is desired. The UCD7138 gate driver is a companion device to the UCD3138A highly-

integrated digital controller for isolated power.

Figure 5-6. Synchronous Rectifier Peripheral use with Synchronous Rectifier Driver

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