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STV6889 bảng dữ liệu(PDF) 25 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  HIGH-END I²C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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8 I²C-BUS CONTROL REGISTER MAP
The device slave address is 8C in write mode and 8D in read mode. The control register map is given in
Table .
Bold weight denotes default value at Power-On-Reset.
I²C-bus data in the adjustment register is buffered and internally applied with discharge of the vertical os-
cillator (56).
In order to ensure compatibility with future devices, all “Reserved” bits should be set to 0.
Table 8. I²C-bus control registers
Sad
D7
D6D5D4D3D2D1D0
WRITE MODE (SLAVE ADDRESS = 8C)
00
HDutySyncV
1: Synchro.
0: Asynchro.
HDUTY
Horizontal duty cycle
0
0
0
0
0
0
0
01
HPOS
Horizontal position
1
0000
000
02
HMoiréMode
1: Separated
0: Combined
HMOIRE
Horizontal moiré amplitude
0000
000
03
B+SyncV
0: Asynchro.
BREF
B+reference
1000
000
04
Reserved
05
Reserved
06
BOutPol
0: Type N
Reserved
07
BOutPh
0: H-flyback
1: H-drive
VSIZE
Vertical size
1000
000
08
EWTrHFr
0: No tracking
VPOS
Vertical position
1000
000
09
Reserved
SCOR
S-correction
1000
000
0A
Reserved
CCOR
C-correction
1000
000
0B
Reserved
VMOIRE
Vertical moiré amplitude
0000
000
0C
Reserved
PCC
Pin cushion correction
1000
000
0D
Reserved
KEYST
Keystone correction
1000
000
0E
Reserved
TCC
Top corner correction
1000
000
0F
Reserved
BCC
Bottom corner correction
1000
000
10
HSIZE
Horizontal size
1
0000
000



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