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ST72561 bảng dữ liệu(PDF) 137 Page - STMicroelectronics

tên linh kiện ST72561
Giải thích chi tiết về linh kiện  8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, LINSCI , ACTIVE CAN
PDF  262 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST72561 bảng dữ liệu(HTML) 137 Page - STMicroelectronics

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LIN
SCI
 SERIAL COMMUNICATION INTERFACE (SCI Mode) (Cont’d)
BAUD RATE REGISTER (SCIBRR)
Read/Write
Reset Value: 0000 0000 (00h)
Note: When LIN slave mode is disabled, the SCI-
BRR register controls the conventional baud rate
generator.
Bit 7:6= SCP[1:0] First SCI Prescaler
These 2 prescaling bits allow several standard
clock division ranges:
Bit 5:3 = SCT[2:0] SCI Transmitter rate divisor
These 3 bits, in conjunction with the SCP1 & SCP0
bits define the total division applied to the bus
clock to yield the transmit rate clock in convention-
al Baud Rate Generator mode.
Bit 2:0 = SCR[2:0] SCI Receiver rate divider.
These 3 bits, in conjunction with the SCP[1:0] bits
define the total division applied to the bus clock to
yield the receive rate clock in conventional Baud
Rate Generator mode.
70
SCP1
SCP0
SCT2
SCT1
SCT0
SCR2
SCR1
SCR0
PR Prescaling factor
SCP1
SCP0
10
0
30
1
41
0
13
1
1
TR dividing factor
SCT2
SCT1
SCT0
10
0
0
20
0
1
40
1
0
80
1
1
16
1
0
0
32
1
0
1
64
1
1
0
128
1
1
1
RR dividing factor
SCR2
SCR1
SCR0
10
0
0
20
0
1
40
1
0
80
1
1
16
1
0
0
32
1
0
1
64
1
1
0
128
1
1
1



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