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ONET1130EC bảng dữ liệu(PDF) 45 Page - Texas Instruments

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tên linh kiện ONET1130EC
Giải thích chi tiết về linh kiện  11.7 Gbps Transceiver with Dual CDRs and Modulator Driver
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Trang chủ  http://www.ti.com
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ONET1130EC bảng dữ liệu(HTML) 45 Page - Texas Instruments

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ONET1130EC
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SLLSEJ3A – JUNE 2015 – REVISED JULY 2015
8.6.5 Read Only Registers
8.6.5.1 Core Level Register 40 (offset = 0000 0000) [reset = 0h]
Figure 62. Core Level Register 40
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 24. Core Level Register 40 Field Descriptions
Bit
Field
Type
Reset
Description
7
ADC9 (MSB)
R
0h
Digital representation of the ADC input source (read only)
6
ADC8
R
0h
5
ADC7
R
0h
4
ADC6
R
0h
3
ADC5
R
0h
2
ADC4
R
0h
1
ADC3
R
0h
0
ADC2
R
0h
8.6.5.2 Core Level Register 41 (offset = 0000 0000) [reset = 0h]
Figure 63. Core Level Register 41
7
6
5
4
3
2
1
0
Reserved
0
0
R
R
R
R
R
R
R
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 25. Core Level Register 41 Field Descriptions
Bit
Field
Type
Reset
Description
7:2
–
R
0h
Reserved
1
ADC1
R
0h
Digital representation of the ADC input source (read only)
0
ADC0 (LSB)
R
0h
Copyright © 2015, Texas Instruments Incorporated
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