A25QBO080QL datasheet(44/58 Pages) AMICC

44 / 58 page

A25LQ080 Series

(April, 2016, Version 1.0)

AMIC Technology Corp.

Parameter ID (0) (Continued)

Description

Address(h)

(Byte Mode)

Address (Bit)

Data

Comment

Quad Input Address Quad Output Fast

Read Number of Wait States(dummy

bits) needed before valid output

04:00

00110

Quad Input Address Quad Output Fast

Read Number of Mode Bits

18h

07:05

000

This filed should be

counted in clocks.

Quad Input Address Quad Output Fast

Read Opcode

19h

15:08

EBh

Single Input Address Quad Output Fast

Read Number of Wait States(dummy

bits) needed before valid output

20:16

01000

Single Input Address Quad Output Fast

Read Number of Mode Bits

1Ah

23:21

000

This filed should be

counted in clocks.

Single Input Address Quad Output Fast

Read Opcode

1Bh

31:24

6Bh

Single Input Address Dual Output Fast

Read Number of Wait States(dummy

bits) needed before valid output

04:00

01000

Single Input Address Dual Output Fast

Read Number of Mode Bits

1Ch

07:05

000

This filed should be

counted in clocks.

Single Input Address Dual Output Fast

Read Opcode

1Dh

15:08

3Bh

Dual Input Address Dual Output Fast

Read Number of Wait States(dummy

bits) needed before valid output

20:16

00100

Dual Input Address Dual Output Fast

Read Number of Mode Bits

1Eh

23:21

000

This filed should be

counted in clocks.

Dual Input Address Dual Output Fast

Read Opcode

1Fh

31:24

BBh

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