A25QBO080QL datasheet(38/58 Pages) AMICC

tên linh kiện	A25QBO080QL

Giải thích chi tiết về linh kiện	8Mbit, 3V Suspend/Resume, Dual/Quad-I/O Serial Flash Memory

PDF	58 Pages

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nhà sản xuất	AMICC [AMIC Technology]

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A25LQ080 Series

(April, 2016, Version 1.0)

AMIC Technology Corp.

High Performance Mode (A3h)

The High Performance Mode (HPM) instruction can be

executed prior to Dual or Quad I/O instructions if chip is

operated at high frequencies. This instruction allows

pre-charging of internal charge pumps so the voltages

required for accessing the Flash memory array are readily

available. The instruction sequence includes the A3h

instruction code followed by three dummy byte clocks shown

in Fig.28. After the HPM instruction is executed, the device

will maintain a slightly higher standby current than standard

SPI operation. The Release from Power-down (ABh) can be

used to return to standard SPI standby current (ICC1). In

addition, Write Enable instruction (06h) and Power Down

instruction (B9h) will also release the device from HPM mode

back to standard SPI standby state.

Figure 27. High Performance Mode Instruction Sequence

Instruction (A3)

MSB

810

01 2 3 4 5 6 7

3 Dummy Bytes

28 29 30 31

23 22 21

3 21 00

tRES2

High Performance

Current

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