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MCP2035-I/ST bảng dữ liệu(PDF) 7 Page - Microchip Technology

tên linh kiện MCP2035-I/ST
Giải thích chi tiết về linh kiện  Analog Front-End Device for BodyCom Applications
PDF  68 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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Gap time after AGC stabilization time
TGAP
200
—
—
µs
Time element of pulse
TE
100
—
—
µs
Minimum pulse width
Time from exiting Sleep or POR to being
ready to receive signal
TRDY
——
50(1)
ms
Minimum time AGC level must be held after
receiving AGC Preserve command
TPRES
5(1)
—
—
ms
AGC level must not change more than 10% during
TPRES
Internal RC oscillator frequency
FOSC
27
32
35.5
kHz
Internal clock trimmed at 32 kHz during test
Inactivity Timer time-out
TINACT
13.5
16
17.75
ms
512 cycles of RC oscillator @ FOSC
Alarm Timer time-out
TALARM
27
32
35.5
ms
1024 cycles of RC oscillator @ FOSC
Input Resistance
(LCX)
RIN
—800(1)
—k
LCCOM grounded, VDD = 3V, FCARRIER = 125 kHz
Input Parasitic Capacitance
(LCX)
CIN
—24(1)
—
pF
LCCOM grounded, VDD = 3V, FCARRIER = 125 kHz
Minimum output enable filter high time
OEH (Bits Config0<8:7>
)
01
= 1 ms
TOEH
32 (~1 ms)
—
—
clock
count
RC oscillator = FOSC
(see FOSC specification
for variations).
Viewed from the pin input:
(Note 3)
10
= 2 ms
64 (~2 ms)
—
—
11
= 4 ms
128 (~4 ms)
—
—
00
= Filter Disabled
—
—
—
Minimum output enable filter low time
OEL (Bits Config0<6:5>
)
00
= 1 ms
TOEL
32 (~1 ms)
—
—
clock
count
RC oscillator = FOSC
Viewed from the pin input:
(Note 4)
01
= 1 ms
32 (~1 ms)
—
—
10
= 2 ms
64 (~2 ms)
—
—
11
= 4 ms
128 (~4 ms)
—
—
AC CHARACTERISTICS (CONTINUED)
Electrical Specifications:
Standard Operating Conditions (unless otherwise stated), Supply Voltage: 2.0V
VDD 3.6V, Operating temperature: -40°C  TA  +85°C,
LCCOM connected to VSS, LCX Input Signal: Sinusoidal 300 mVPP, Carrier Frequency = 125 kHz, Bits <3:1> of Configuration Register 0: LCXEN = 0, LCZEN =
LCYEN = 1.
Parameters
Sym.
Min.
Typ(2)
Max.
Units
Conditions
Note 1:
Parameter is characterized but not tested.
2:
Data in “Typ.” column is at 3.0V, +25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
3:
Required output enable filter high time must account for input path analog delays (= TOEH - TDR + TDF).
4:
Required output enable filter low time must account for input path analog delays (= TOEL + TDR - TDF).



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