MCP2035-ISLASHST datasheet(46/68 Pages) MICROCHIP

46 / 68 page

MCP2035

DS22304A-page 46

 2012 Microchip Technology Inc.

FIGURE 5-11:

SPI Read Sequence.

LFDATA/RSSI/

CCLK/SDIO

TSU THD

TSCCS

THI TLO

1/FSCLK

TCS1

TCSH

TCS0

SDI

(input)

SCLK

(input)

ALERT

(output)

LFDATA

(output)

16 Clocks for Read Command,

TCSSC

TCSSC TCS1

TCSH

TCS0

SDO

SCLK

(input)

ALERT

(output)

LFDATA

(output)

16 Clocks for Read Result

(output)

SCLK/ALERT

ALERT

LFDATA

(output)

TDO

MSb

LSb

TCSSC

Address and Dummy Data

MCU SPI Read Details:

Drive the open collector ALERT output low

•

To ensure no false clocks occur when CS drops

Drop CS

•

SCLK/ALERT becomes SCLK input

•

LFDATA/CCLK/SDIO becomes SDI input

Change LFDATA/CCLK/SDIO connected pin to output

•

Driving SPI data

Clock in 16-bit SPI Read sequence

•

Command, address and dummy data

Change LFDATA/CCLK/SDIO connected pin to input

Raise CS to complete the SPI Read entry of command and address

Drop CS

•

AFE SCLK/ALERT becomes SCLK input

•

LFDATA/CCLK/SDIO becomes SDO output

Clock out 16-bit SPI Read result

•

First seven bits clocked-out are dummy bits

•

Next eight bits are the Configuration register data

•

The last bit is the Configuration register row parity bit

Raise CS to complete the SPI Read

10. Change SCLK/ALERT back to input

Note:

The TCSH is considered as one clock. Therefore, the Configuration register data appears at

6th clock after TCSH.

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