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MCP19116-E/MJ bảng dữ liệu(PDF) 23 Page - Microchip Technology |
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MCP19116-E/MJ bảng dữ liệu(HTML) 23 Page - Microchip Technology |
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23 / 246 page ![]() 2015-2016 Microchip Technology Inc. DS20005479B-page 23 MCP19116/7 Line Regulation VDD-OUT/ (VDD-OUT * VIN) –0.1 0.002 0.1 %/V (VDD +1.0V) VIN 20V (Note 2) Load Regulation VDD-OUT/ VDD-OUT –1.0 0.1 1.0 %IDD_OUT =1 mA to 20 mA (Note 2) Output Short-Circuit Current IDD_SC —50 — mA VIN =(VDD +1.0V) (Note 2) Dropout Voltage VIN –VDD —0.3 0.5 VIDD_OUT =20 mA (Notes 2 and 3) Power Supply Rejection Ratio PSRRLDO —60 — dB f 1000 Hz IDD_OUT =25 mA CIN =0 µF, CDD =1 µF Linear Regulator AVDD Internal Analog Supply Voltage AVDD —4.096 — V AVDD Tolerance AVDD_TOL –2.5 ±0.5 2.5 % Trimmed at 25°C, 0°C to 125°C –3.3 — 3.3 % -40°C to 0°C Band Gap Voltage BG — 1.23 — V Trimmed at 1.0% tolerance Band Gap Tolerance BGTOL –2.5 — 2.5 % Input UVLO Voltage UVLO Range UVLOON 4 — 20 VVIN Falling UVLOON Trip Tolerance UVLOTOL –14 — 14 %VIN Falling UVLO trip set to 9V VINUVLO = 0x21h UVLO Hysteresis UVLOHYS 1 4 8 % Hysteresis is based upon the UVLOON setting UVLO trip set to 9V VINUVLO = 0x21h Resolution nbits — 6 — bits Logarithmic Steps UVLO Comparator Input-to-Output Delay TD — 5 — µs 100 ns rise time to 1V overdrive on VIN VIN > UVLO to flag set Input OVLO Voltage OVLO Range OVLOON 8.8 — 44 VVIN Rising OVLOON Trip Tolerance OVLOTOL –14 — 14 %VIN Rising OVLO trip set to 18V VINOVLO = 0x1Fh 4.2 Electrical Characteristics (Continued) Electrical Specifications: Unless otherwise noted, VIN =12V, FSW =150 kHz, TA =+25°C. Boldface specifications apply over the TA range of -40°C to +125°C. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: Refer to Section 16.0, Power-Down Mode (Sleep). 2: VDD is the voltage present at the VDD pin. 3: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential between VIN and VDD. 4: Ensured by design, not production tested. 5: These parameters are characterized, but not production tested. 6: The VDD LDO will limit the total source current to a maximum of 35 mA. Individually each pin can source a maximum of 15 mA. |
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