LP3971 datasheet(4/52 Pages) TI1

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LP3971

SNVS432V – JANUARY 2006 – REVISED MAY 2013

www.ti.com

Connection Diagrams

Figure 3. 40-Pin WQFN

Package Number RSB0040A

Note: Circle marks Pin 1 position.

Table 1. Default VOUT Coding

Default VOUT

1.3

1.8

2.5

2.8

3.0

3.3

1.0

1.4

1.2

1.25

1.35

Default Enable Option:

SYS_EN or PWR_EN

Pin Descriptions(1)

Pin #

Name

I/O

Type

Description

PWR_ON

This is an active HI push button input which can be used to signal PWR_ON

and PWR_OFF events to the CPU by controlling the ext_wakup [pin4] and

select contents of register 8H'02

nTEST_JIG

This is an active LOW input signal used for detecting an external HW event. The

response is seen in the ext_wakup [pin4] and select contents of register 8H'02

SPARE

This is an input signal used for detecting a external HW event. The response is

seen in the ext_wakup [pin4] and select contents of register 8H'02. The polarity

on this pin is assignable

EXT_WAKEUP

This pin generates a single 10mS pulse output to CPU in response to input from

pin[s] 1, 2, and 3. Flags CPU to interrogate register 8H'02

FB1

Buck1 input feedback terminal

VIN

PWR

Battery Input (Internal circuitry and LDO1-3 power input)

VOUT LDO1

PWR

LDO1 output

VOUT LDO2

PWR

LDO2 output

(1)

A: Analog Pin D: Digital Pin G: Ground Pin P: Power Pin I: Input Pin I/O: Input/Output Pin O: Output Pin

Note: In this document active low logic items are prefixed with a lowercase “n”

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