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LP3913 bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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LP3913 bảng dữ liệu(HTML) 3 Page - Texas Instruments |
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3 / 70 page ![]() 1 2 3 4 5 6 7 8 9 10 11 12 25 26 27 28 29 30 31 32 33 34 35 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 LP3913 www.ti.com SNVS489I – NOVEMBER 2006 – REVISED SEPTEMBER 2013 Connection Diagram Device Connection Diagram Figure 1. 48 WQFN Package (Top View) Package Number NJV0048A Table 1. Additional Application Information Part Number LDO1 (V) LDO2 (V) Buck1 (V) Buck2 (V) Buck 3 (V) ICHRG (mA) LP3913SQ-AA/LP3913SQX-AA 2.00 3.30 1.20 3.30 3.30 100 LP3913SQ-AC/LP3913SQX-AC 1.30 3.30 1.30 1.80 3.30 100 LP3913SQ-AD/LP3913SQX-AD 2.00 3.30 1.20 1.80 3.30 100 LP3913SQ-ADJ/LP3913SQX-ADJ 1.80 3.30 ADJ ADJ 3.30 100 LP3913SQ-AE/LP3913SQX-AE 1.30 3.30 1.30 3.30 3.30 100 LP3913SQ-AR/LP3913SQX-AR 1.80 3.30 1.20 1.80 3.30 1000 Pin Descriptions Pin # Name I/O Type Functional Description 1 TS I A Battery temperature sense pin. This pin is normally connected to the thermistor pin of the battery cell. 2 VBATT1 O A Positive battery terminal. This pin must be externally shorted to VBATT2 and VBATT3 3 AGND G G Analog Ground 4 VREFH O A Connection to bypass capacitor for internal high reference 5 LDO2EN I D Digital input to enable/disable LDO2 6 VLDO2 O A LDO2 Output 7 VIN1 I PWR Power input to LDO1 and LDO2. VIN1 pin must be externally shorted to the VDD pins. 8 VLDO1 O A LDO1 Output 9 POWERACK I D Digital power acknowledgment input (see Power On/Off Sequencing) 10 ISENSE I A A 4.64-k Ω resistor must be connected between this pin and GND. A fraction of the charge current flows through this resistor to enable the A to D converter to measure the charge current. 11 ADC2 I A Channel 2 input to AD converter 12 ADC1 I A Channel 1 input to AD converter 13 IRQB O Open Open drain active low interrupt request Drain Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LP3913 |
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