WM8739LEDS datasheet(28/35 Pages) WOLFSON

28 / 35 page

WM8739 / WM8739L

Advanced Information

AI Rev 2.2 September 2001

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

ADCHPD

ADC High Pass Filter Enable (Digital)

1 = Disable High Pass Filter

0 = Enable High Pass Filter

0000101

Digital Audio Path

Control

HPOR

Store dc offset when High Pass Filter

disabled

1 = store offset

0 = clear offset

LINEINPD

Line Input Power Down

1 = Enable Power Down

0 = Disable Power Down

ADCPD

ADC Power Down

1 = Enable Power Down

0 = Disable Power Down

OSCPD

Oscillator Power Down

1 = Enable Power Down

0 = Disable Power Down

0000110

Power Down

Control

POWEROFF

POWEROFF mode

1 = Enable POWEROFF

0 = Disable POWEROFF

1:0

FORMAT[1:0]

Audio Data Format Select

11 = DSP Mode, frame sync + 2 data

packed words

10 = I

2S Format, MSB-First left-1

justified

01 = MSB-First, left justified

00 = MSB-First, right justified

3:2

IWL[1:0]

Input Audio Data Bit Length Select

11 = 32 bits

10 = 24 bits

01 = 20 bits

00 = 16 bits

LRP

DSP mode A/B select (in DSP mode

only)

1 = MSB is available on 2nd BCLK rising

edge after LRC rising edge

0 = MSB is available on 1st BCLK rising

edge after LRC rising edge

0000111

Digital Audio

Interface Format

Master Slave Mode Control

1 = Enable Master Mode

0 = Enable Slave Mode

0USB/

NORMAL

Mode Select

1 = USB mode (250/272fs)

0 = Normal mode (256/384fs)

Base Over-Sampling Rate

1BOSR

USB Mode

0 = 250fs

1 = 272fs

Normal Mode

0 = 256fs

1 = 384fs

5:2

SR[3:0]

0000

(fs)

ADC sample rate control;

See USB Mode and Normal Mode

Sample Rate sections for operation

0001000

Sampling

Control

CLKIDIV2

Core Clock divider select

1 = Core Clock is MCLK divided by 2

0 = Core Clock is MCLK

WM8739LEDS bảng dữ liệu(PDF) 28 Page - Wolfson Microelectronics plc

WM8739LEDS bảng dữ liệu(HTML) 28 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

bảng dữ liệu tải về

Link URL