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CAP1293 bảng dữ liệu(PDF) 34 Page - Microchip Technology

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CAP1293
DS00001566B-page 34
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5.10
Averaging and Sampling Configuration Register
The Averaging and Sampling Configuration register controls the number of samples taken and the target sensing cycle
time for sensor inputs enabled in the Active state.
Bits 6 - 4 - AVG[2:0] - Determines the number of samples that are taken for all channels enabled in the Active state
during the sensing cycle as shown in Table 5-19. All samples are taken consecutively on the same channel before the
next channel is sampled and the result is averaged over the number of samples measured before updating the mea-
sured results.
For example, if CS1, CS2, and CS3 are sampled during the sensing cycle, and the AVG[2:0] bits are set to take 4 sam-
ples per channel, then the full sensing cycle will be: CS1, CS1, CS1, CS1, CS2, CS2, CS2, CS2, CS3, CS3, CS3, CS3.
Bits 3 - 2 - SAMP_TIME[1:0] - Determines the time to take a single sample as shown in Table 5-20. Sample time affects
the magnitude of the base counts, as shown in Table 4-1, "Ideal Base Counts".
TABLE 5-18:
AVERAGING AND SAMPLING CONFIGURATION REGISTER
Addr
R/W
Register
B7
B6
B5
B4
B3
B2
B1
B0
Default
24h
R/W
Averaging and
Sampling
Config
-
AVG[2:0]
SAMP_TIME[1:0]
CYCLE_TIME
[1:0]
39h
TABLE 5-19:
AVG BIT DECODE
AVG[2:0]
Number Of Samples Taken Per
Measurement
21
0
00
0
1
00
1
2
01
0
4
0
1
1
8 (default)
10
0
16
10
1
32
11
0
64
1
1
1
128
TABLE 5-20:
SAMP_TIME BIT DECODE
SAMP_TIME[1:0]
Sample Time
10
0
0
320us
0
1
640us
1
0
1.28ms (default)



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