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FPD87392 bảng dữ liệu(PDF) 10 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện FPD87392
Giải thích chi tiết về linh kiện  3.3V TFT-LCD Timing Controller with Dual LVDS Inputs/Dual RSDS??Outputs for TFT-LCD Monitor and Notebook (SXGA/SXGA/UXGA)
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FPD87392 bảng dữ liệu(HTML) 10 Page - National Semiconductor (TI)

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AC Electrical Characteristics
T
A = 0˚C to 70˚C, VDD = 3.0V to 3.6V, IPI = 100 µA (Unless otherwise specified) (Continued)
Output Timing
Symbol
Parameter
Conditions
Min
Typ
Max
Units
RCHP
RSDS Clock (RSCK) High Period
R
T = 100
Ω,I
PI = 100 µA,
CLK= 85 MHz
5.7
ns
RCLP
RSDS Clock (RSCK) Low Period
R
T = 100
Ω,I
PI = 100 µA,
CLK = 85 MHz
5.8
ns
SPSTU
STH Rising to RSCK Falling
R
T = 100
Ω,I
PI = 100 µA,
CLK = 85 MHz
3.0
ns
SPHLD
STH Falling to RSCK Falling
R
T = 100
Ω,I
PI = 100 µA,
CLK = 85 MHz
3.0
ns
RSTU
RS(R, G, B) Setup to Falling or
Rising Edge of RSCK
R
T = 100
Ω,C
L(RSDS) = 5 pF,
I
PI = 100 µA,
CLK = 85 MHz, RSDS[2:0] = “100”
3.28
ns
RHLD
RS(R, G, B) Hold from Falling or
Rising Edge of RSCK
R
T = 100
Ω,C
L(RSDS) = 5 pF,
I
PI = 100 µA, CLK= 85 MHz,
RSDS[2:0] = “100”
1.87
ns
RSDS Setup and Hold Time with Data Skew Control Values - Reference
Only
(RxCLKP/N = 85 MHz; V
DD = 3.0 to 3.6V, RT = 100
Ω;I
PI = 100 µA; Duty Clock = 50%/50%, ±5%; 25˚C)
Note: Typical values on this table are measured under Static and Steady state conditions which may not be reflective of its per-
formance in the end application.
RSDS[2:0]
Setup Time (RSTU)
Hold Time (RHLD)
Units
Min
Typ
Max
Min
Typ
Max
000
1.26
3.91
ns
001
1.75
3.41
010
2.30
2.90
011
2.77
2.41
100
3.28
1.87
101
3.79
1.37
110
4.27
0.89
111
4.77
0.76
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