TMS320VC5509 datasheet(22/122 Pages) TI

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Introduction

April 2001 − Revised September 2004

SPRS163G

Table 2−3. Signal Descriptions (Continued)

TERMINAL

NAME

RESET

CONDITION

BK‡

FUNCTION

I/O/Z†

MULTIPLEXED

SIGNAL NAME

PARALLEL BUS (CONTINUED)

C10

I/O/Z

EMIF SDRAM row strobe, HPI address strobe, or general-purpose IO12.

This pin serves in one of three functions: EMIF SDRAM row strobe

(EMIF.SDRAS), HPI address strobe (HPI.HAS), or general-purpose IO12

(GPIO12). The initial state of this pin depends on the GPIO0 pin. See

Section 3.5.1 for more information.

GPIO0 = 1:

Output,

EMIF.SDRAS

O/Z

Active-low EMIF SDRAM row strobe. EMIF.SDRAS is selected when the

Parallel Port Mode bit field of the External Bus Selection Register is set to

00 or 01.

Output,

EMIF.SDRAS

GPIO0 = 0:

HPI.HAS

Active-low HPI address strobe. This signal latches the address in the HPIA

Parallel Port Mode bit field is set to 11.

GPIO0 = 0:

Input,

HPI.HAS

GPIO12

I/O/Z

General-purpose IO12. GPIO12 is selected when the Parallel Port Mode

bit field is set to 10.

C11

I/O/Z

EMIF SDRAM column strobe or HPI chip select input. This pin serves in

one of two functions: EMIF SDRAM column strobe (EMIF.SDCAS) or HPI

chip select input (HPI.HCS). The initial state of this pin depends on the

GPIO0 pin. See Section 3.5.1 for more information.

GPIO0 = 1:

Output,

EMIF.SDCAS

O/Z

Active-low EMIF SDRAM column strobe. EMIF.SDCAS is selected when

the Parallel Port Mode bit field of the External Bus Selection Register is set

to 00 or 01.

EMIF.SDCAS

GPIO0 = 0:

Input,

HPI.HCS

HPI Chip Select Input. HPI.HCS is the select input for the HPI and must be

driven low during accesses. HPI.HCS is selected when the Parallel Port

Mode bit field is set to 10 or 11.

Input,

HPI.HCS

C12

I/O/Z

EMIF SDRAM write enable or HPI Data Strobe 1 input. This pin serves in

one of two functions: EMIF SDRAM write enable (EMIF.SDWE) or HPI

data strobe 1 (HPI.HDS1). The initial state of this pin depends on the

GPIO0 pin. See Section 3.5.1 for more information.

GPIO0 = 1:

Output,

EMIF.SDWE

O/Z

EMIF SDRAM write enable. EMIF. SDWE is selected when the Parallel

Port Mode bit field of the External Bus Selection Register is set to 00 or 01.

EMIF.SDWE

GPIO0 = 0:

HPI.HDS1

HPI Data Strobe 1 Input. HPI.HDS1 is driven by the host read or write

strobes to control the transfer. HPI.HDS1 is selected when the Parallel

Port Mode bit field is set to 10 or 11.

GPIO0 = 0:

Input,

HPI.HDS1

† I = Input, O = Output, S = Supply, Hi-Z = High-impedance

‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,

PD = pulldown, H = hysteresis input buffer

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