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ADUC848BCP8-5 bảng dữ liệu(PDF) 91 Page - Analog Devices |
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ADUC848BCP8-5 bảng dữ liệu(HTML) 91 Page - Analog Devices |
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91 / 108 page ![]() ADuC845/ADuC847/ADuC848 Rev. A | Page 91 of 108 C1+ V+ C1– C2+ C2– V– T2OUT R2IN VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT ADM3202 RS232 INTERFACE* 1 2 3 4 5 6 7 8 9 DVDD STANDARD D-TYPE SERIAL COMMS CONNECTOR TO PC HOST *EXTERNAL UART TRANSCEIVER INTEGRATED IN SYSTEM OR AS PART OF AN EXTERNAL DONGLE AS DESCRIBED IN APPLICATION NOTE uC006. 0.1 µF 0.1 µF 0.1 µF 0.1 µF RESET ACTIVE HIGH. (NORMALLY OPEN) 35 34 43 44 1k Ω DVDD 1k Ω 2-PIN HEADER FOR EMULATION ACCESS (NORMALLY OPEN) DOWNLOAD/DEBUG ENABLE JUMPER (NORMALLY OPEN) 32.768kHz DVDD DVDD AVDD AVDD AGND AGND REFIN– REFIN+ P1.0/AIN1 P1.1/AIN2 P1.6/IEXC1/AIN7 200mA/400mA EXCITATION CURRENT RTD RREF 5.6kV XTAL2 XTAL1 ADuC845/ADuC847/ADuC848 CSP PACKAGE 11 4 5 6 7 8 56 1 17 18 19 22 36 51 37 38 50 23 0.1 µF Figure 69. UART Connectivity in Typical System In addition to the basic UART connections, users also need a way to trigger the chip into download mode. This is accomplished via a 1 kΩ pull-down resistor that can be jumpered onto the PSEN pin, as shown in Figure 69. To get the parts into download mode, connect this jumper and power-cycle the device (or manually reset the device, if a manual reset button is available), and it is ready to receive a new program serially. With the jumper removed, the device powers on in normal mode (and runs the program) whenever power is cycled or RESET is toggled. Note that PSEN is normally an output and that it is sampled as an input only on the falling edge of RESET, that is, at power-on or upon an external manual reset. Note also that if any external circuitry unintentionally pulls PSEN low during power-on or reset events, it could cause the chip to enter download mode and fail to begin user code execution. To prevent this, ensure that no external signals are capable of pulling the PSEN pin low, except for the external PSEN jumper itself or the method of download entry in use during a reset or power-cycle condition. Embedded Serial Port Debugger From a hardware perspective, entry to serial port debug mode is identical to the serial download entry sequence described previously. In fact, both serial download and serial port debug modes are essentially one mode of operation used in two different ways. Note that the serial port debugger is fully contained on the device, unlike ROM monitor type debuggers, and, therefore, no external memory is needed to enable in-system debug sessions. |
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