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DS99R101 bảng dữ liệu(PDF) 12 Page - Texas Instruments

tên linh kiện DS99R101
Giải thích chi tiết về linh kiện  DS99R101/DS99R102 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
PDF  29 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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DS99R101 bảng dữ liệu(HTML) 12 Page - Texas Instruments

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DS99R101, DS99R102
SNLS240D – MARCH 2007 – REVISED APRIL 2013
www.ti.com
DS99R101 Serializer Pin Descriptions
Pin #
Pin Name
I/O
Description
LVCMOS PARALLEL INTERFACE PINS
4-1,
DIN[23:0]
LVCMOS_I
Transmitter Parallel Interface Data Inputs Pins. Tie LOW if unused, do not float.
48-44,
41-32,
29-25
10
TCLK
LVCMOS_I
Transmitter Parallel Interface Clock Input Pin. Strobe edge set by TRFB configuration pin.
CONTROL AND CONFIGURATION PINS
9
TPWDNB
LVCMOS_I
Transmitter Power Down Bar
TPWDNB = H; Transmitter is Enabled and ON
TPWDNB = L; Transmitter is in power down mode (Sleep), LVDS Driver DOUT (+/-) Outputs are
in TRI-STATE stand-by mode, PLL is shutdown to minimize power consumption.
18
DEN
LVCMOS_I
Transmitter Data Enable
DEN = H; LVDS Driver Outputs are Enabled (ON).
DEN = L; LVDS Driver Outputs are Disabled (OFF), Transmitter LVDS Driver DOUT (+/-) Outputs
are in TRI-STATE, PLL still operational and locked to TCLK.
11
TRFB
LVCMOS_I
Transmitter Rising/Falling Bar
TRFB = H; DIN LVCMOS Input clocked on Rising TCLK
TRFB = L; DIN LVCMOS Input clocked on Falling TCLK
12
VODSEL
LVCMOS_I
VOD Level Select
VODSEL = L; LVDS Driver Output is
≈±400 mV (RL = 100Ω)
VODSEL = H; LVDS Driver Output is
≈±750 mV (RL = 100Ω)
5
DCAOFF
LVCMOS_I
RESERVED – This pin MUST be tied LOW.
8
DCBOFF
LVCMOS_I
RESERVED – This pin MUST be tied LOW.
13
RESRVD
LVCMOS_I
RESERVED – This pin MUST be tied LOW.
23
NC
NC
No Connect – Make NO connection – leave open
LVDS SERIAL INTERFACE PINS
20
DOUT+
LVDS_O
Transmitter LVDS True (+) Output. This output is intended to be loaded with a 100 ohm load to
the DOUT+ pin. The interconnect should be AC Coupled to this pin with a 100 nF capacitor.
19
DOUT
−
LVDS_O
Transmitter LVDS Inverted (-) Output This output is intended to be loaded with a 100 ohm load to
the DOUT- pin. The interconnect should be AC Coupled to this pin with a 100 nF capacitor.
POWER / GROUND PINS
22
VDDDR
VDD
Analog Voltage Supply, LVDS Output Power
21
VSSDR
GND
Analog Ground, LVDS Output Ground
16
VDDPT0
VDD
Analog Voltage supply, VCO Power
17
VSSPT0
GND
Analog Ground, VCO Ground
14
VDDPT1
VDD
Analog Voltage supply, PLL Power
15
VSSPT1
GND
Analog Ground, PLL Ground
30
VDDT
VDD
Digital Voltage supply, Tx Serializer Power
31
VSST
GND
Digital Ground, Tx Serializer Ground
7
VDDL
VDD
Digital Voltage supply, Tx Logic Power
6
VSSL
GND
Digital Ground, Tx Logic Ground
42
VDDIT
VDD
Digital Voltage supply, Tx Input Power
43
VSSIT
GND
Digital Ground, Tx Input Ground
24
VSS
GND
ESD Ground
12
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Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: DS99R101 DS99R102



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