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ADE3700 bảng dữ liệu(PDF) 17 Page - STMicroelectronics

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ADE3700
Analog-to-Digital Converter (ADC)
2.3
Analog-to-Digital Converter (ADC)
The analog port consists of three 9-bit RGB ADCs with preamp, gain/offset adjustment and digital
filtering. The I2C interface for the ADC block is in the INCLK clock domain which must be active for
programming.
The relationship of input voltage, gain and offset register settings to output code is approximately as
follows:
output_code_8b = 457 x offset / 28 + 181 x gain x input_mV / 216 - 125 x gain x offset / 216 - 219
Table 5: FM Frequency Synthesizer Registers
Register Name
Addr
Mode
Bits
Default
Description
FM_FS_CTRL
0x0830
[7:4]
Reserved
R/W
[3]
0x0
Clear the FM synthesizer
R/W
[2]
0x0
Clear the fs accumulator
R/W
[1]
0x0
Activate the frequency modulation
R/W
[0]
0x0
Divide the output by 2
FM_FS_PR_0
0x0831
R/W
[7:0]
8000000
Phase Rate
FM_FS_PR_1
0x0832
R/W
[7:0]
FM_FS_PR_2
0x0833
R/W
[7:0]
FM_FS_PR_3
0x0834
R/W
[7:0]
FM_FS_AMPLITUDE
0x0835
R/W
[7:0]
0x0
LSB = 72 ps
FM_FS_PERIODX64
0x0836
R/W
[7:0]
0x80
LSB = 1.185 us
FM_FS_PULSE_EXT
0x0837
R/W
[7]
0x0
Enable
[6:3]
Reserved
R/W
[2:0]
0x0
Value
Table 6: ADC Registers (Sheet 1 of 2)
Register
Addr.
Mode
Bits
Default
Description
ADC_DITHER
0x0324
[7]
Reserved
R/W
[6]
0x0
Dither horizontally
R/W
[5]
0x0
Dither vertically
R/W
[4]
0x0
Dither temporally
R/W
[3]
0x0
Force dither high
R/W
[2]
0x0
Enable dither
[1:0]
0x0
Reserved
ADC_OFFSET_R
0x0326
R/W
[7:0]
0x0
Offset Control, Red Channel
ADC_OFFSET_G
0x0328
R/W
[7:0]
0x0
Offset Control, Green Channel



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